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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmicrochip,pic64gx-pinctrl-gpio2.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/microchip,pic64gx-pinctrl-gpio2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip PIC64GX GPIO2 Mux
10 - Conor Dooley <conor.dooley@microchip.com>
13 The "GPIO2 Mux" determines whether GPIO2 or select other functions are
15 mapped to this mux via iomux0 for settings here to have any impact.
19 const: microchip,pic64gx-pinctrl-gpio2
24 pinctrl-use-default: true
[all …]
H A Dairoha,an7583-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/airoha,an7583-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo@kernel.org>
17 const: airoha,an7583-pinctrl
22 gpio-controller: true
24 '#gpio-cells':
27 gpio-ranges:
30 interrupt-controller: true
[all …]
H A Dste,nomadik.txt4 - compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
5 "stericsson,stn8815-pinctrl"
6 - nomadik-gpio-chips: array of phandles to the corresponding GPIO chips
8 - prcm: phandle to the PRCMU managing the back end of this pin controller
10 Please refer to pinctrl-bindings.txt in this directory for details of the
17 mux function to select on those pin(s)/group(s), and various pin configuration
23 (see pinctrl-bindings.txt):
26 - function: A string containing the name of the function to mux to the
28 - groups : An array of strings. Each string contains the name of a pin
30 set-up.
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-lx2162a-clearfog.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2023 Josua Mayer <josua@solid-run.com>
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
10 #include "fsl-lx2162a-sr-som.dtsi"
14 compatible = "solidrun,lx2162a-clearfog", "solidrun,lx2162a-som", "fsl,lx2160a";
35 stdout-path = "serial0:115200n8";
39 compatible = "gpio-leds";
41 led_sfp_at: led-sfp-at {
42 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* PROC_IRQ5 */
[all …]
H A Dfsl-ls1028a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1028a.dtsi"
17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
22 gpio1 = &gpio2;
23 gpio2 = &gpio3;
32 stdout-path = "serial0:115200n8";
40 sys_mclk: clock-mclk {
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
[all …]
H A Dfsl-ls1043a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
6 * Copyright 2018-2021 NXP
11 /dts-v1/;
12 #include "fsl-ls1043a.dtsi"
16 compatible = "fsl,ls1043a-qds", "fsl,ls1043a";
20 gpio1 = &gpio2;
21 gpio2 = &gpio3;
27 sgmii-riser-s1-p1 = &sgmii_phy_s1_p1;
[all …]
H A Dfsl-ls1046a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
6 * Copyright 2018-2019 NXP
11 /dts-v1/;
13 #include "fsl-ls1046a.dtsi"
17 compatible = "fsl,ls1046a-qds", "fsl,ls1046a";
20 emi1-slot1 = &ls1046mdio_s1;
21 emi1-slot2 = &ls1046mdio_s2;
22 emi1-slot4 = &ls1046mdio_s4;
25 gpio2 = &gpio2;
[all …]
/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm730-gbs.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
10 compatible = "quanta,gbs-bmc","nuvoton,npcm730";
71 stdout-path = &serial0;
78 gpio-keys {
79 compatible = "gpio-keys";
80 sas-cable0 {
81 label = "sas-cable0";
[all …]
H A Dnuvoton-wpcm450.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
14 gpio2 = &gpio2;
23 #address-cells = <1>;
24 #size-cells = <0>;
27 compatible = "arm,arm926ej-s";
33 clk24m: clock-24mhz {
35 compatible = "fixed-clock";
[all …]
H A Dnuvoton-npcm730-gsj.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
6 #include "nuvoton-npcm730-gsj-gpio.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
31 stdout-path = &serial3;
39 compatible = "gpio-leds";
41 led-bmc-live {
43 linux,default-trigger = "heartbeat";
48 default-state = "off";
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3326-odroid-go3.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3326-odroid-go.dtsi"
12 model = "ODROID-GO Super";
13 compatible = "hardkernel,rk3326-odroid-go3", "rockchip,rk3326";
15 joystick_mux_controller: mux-controller {
16 compatible = "gpio-mux";
18 #mux-control-cells = <0>;
20 mux-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>,
24 joystick_mux: adc-mux {
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-nitrogen6_max.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
10 stdout-path = &uart2;
18 reg_1p8v: regulator-1p8v {
19 compatible = "regulator-fixed";
20 regulator-name = "1P8V";
21 regulator-min-microvolt = <1800000>;
22 regulator-max-microvolt = <1800000>;
23 regulator-always-on;
[all …]
H A Dimx53-sk-imx53-atm0700d4-lvds.dts1 // SPDX-License-Identifier: GPL-2.0+
5 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
8 #include "imx53-sk-imx53-atm0700d4.dtsi"
11 lvds-decoder {
12 compatible = "ti,sn65lvds94", "lvds-decoder";
15 #address-cells = <1>;
16 #size-cells = <0>;
22 remote-endpoint = <&lvds0_out>;
30 remote-endpoint = <&panel_rgb_in>;
[all …]
H A Dimx6q-bx50v3.dtsi5 * This file is dual-licensed: you can use it either under the terms
43 #include "imx6q-ba16.dtsi"
46 mclk: clock-mclk {
47 compatible = "fixed-clock";
48 #clock-cells = <0>;
49 clock-frequency = <22000000>;
52 gpio-poweroff {
53 compatible = "gpio-poweroff";
58 reg_wl18xx_vmmc: regulator-wl18xx {
59 compatible = "regulator-fixed";
[all …]
H A Dimx25-pdk.dts1 // SPDX-License-Identifier: GPL-2.0+
5 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
12 compatible = "fsl,imx25-pdk", "fsl,imx25";
19 reg_fec_3v3: regulator-0 {
20 compatible = "regulator-fixed";
21 regulator-name = "fec-3v3";
22 regulator-min-microvolt = <3300000>;
23 regulator-max-microvolt = <3300000>;
[all …]
/linux/drivers/pinctrl/bcm/
H A Dpinctrl-bcm6318.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include "../pinctrl-utils.h"
19 #include "pinctrl-bcm63xx.h"
42 PINCTRL_PIN(2, "gpio2"),
146 BCM_PIN_GROUP(gpio2),
200 "gpio2",
234 "gpio2",
305 #define BCM6318_MUX_FUN(n, mux) \ argument
310 .mux_val = mux, \
389 unsigned int mode, unsigned int mux) in bcm6318_rmw_mux() argument
[all …]
H A Dpinctrl-bcm6328.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include "../pinctrl-utils.h"
19 #include "pinctrl-bcm63xx.h"
47 PINCTRL_PIN(2, "gpio2"),
80 * to their mux offsets.
125 BCM_PIN_GROUP(gpio2),
164 "gpio2",
241 #define BCM6328_MUX_FUN(n, mux) \ argument
246 .mux_val = mux, \
313 unsigned int mode, unsigned int mux) in bcm6328_rmw_mux() argument
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-nano.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Newflow Ltd - https://www.newflow.co.uk/
5 /dts-v1/;
15 cpu0-supply = <&dcdc2_reg>;
25 compatible = "gpio-leds";
30 default-state = "off";
36 pinctrl-names = "default";
37 pinctrl-0 = <&misc_pins>;
39 misc_pins: misc-pins {
40 pinctrl-single,pins = <
[all …]
H A Domap4-duovero-parlor.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 /dts-v1/;
7 #include "omap4-duovero.dtsi"
9 #include <dt-bindings/input/input.h>
13 compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4";
20 compatible = "gpio-leds";
24 linux,default-trigger = "heartbeat";
29 compatible = "gpio-keys";
30 #address-cells = <1>;
31 #size-cells = <0>;
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2020-2024 Rockchip Electronics Co., Ltd.
8 * With some ideas taken from pinctrl-samsung:
14 * and pinctrl-at91:
15 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
30 #include <linux/pinctrl/pinconf-generic.h>
37 #include <dt-bindings/pinctrl/rockchip.h>
41 #include "pinctrl-rockchip.h"
67 { .offset = -1 }, \
68 { .offset = -1 }, \
[all …]
/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mux-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
15 +-----+ +-----+
17 +------------+ +-----+ +-----+
19 | | /--------+--------+
20 | +------+ | +------+ child bus A, on GPIO value set to 0
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dmt2701-cs42448.txt4 - compatible: "mediatek,mt2701-cs42448-machine"
5 - mediatek,platform: the phandle of MT2701 ASoC platform
6 - audio-routing: a list of the connections between audio
7 - mediatek,audio-codec: the phandles of cs42448 codec
8 - mediatek,audio-codec-bt-mrg the phandles of bt-sco dummy codec
9 - pinctrl-names: Should contain only one value - "default"
10 - pinctrl-0: Should specify pin control groups used for this controller.
11 - i2s1-in-sel-gpio1, i2s1-in-sel-gpio2: Should specify two gpio pins to
12 control I2S1-in mux.
17 compatible = "mediatek,mt2701-cs42448-machine";
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62p-verdin-ivy.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
8 * https://www.toradex.com/products/carrier-board/ivy-carrier-board
11 #include <dt-bindings/mux/mux.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/net/ti-dp83867.h>
21 ain1_voltage_unmanaged: voltage-divider-ain1 {
22 compatible = "voltage-divider";
23 #io-channel-cells = <1>;
24 io-channels = <&ivy_adc1 0>;
[all …]
H A Dk3-am62-verdin-ivy.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
8 * https://www.toradex.com/products/carrier-board/ivy-carrier-board
11 #include <dt-bindings/mux/mux.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/net/ti-dp83867.h>
17 ain1_voltage_unmanaged: voltage-divider-ain1 {
18 compatible = "voltage-divider";
19 #io-channel-cells = <1>;
20 io-channels = <&ivy_adc1 0>;
[all …]
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-cfa10049.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
8 * need to include the CFA-10036 DTS.
10 #include "imx28-cfa10036.dts"
13 model = "Crystalfontz CFA-10049 Board";
17 compatible = "i2c-mux-gpio";
18 #address-cells = <1>;
19 #size-cells = <0>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&i2cmux_pins_cfa10049>;
[all …]

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