| /linux/drivers/eisa/ | 
| H A D | eisa.ids | 6 # Marc Zyngier <maz@wild-wind.fr.eu.org>10 ABP0510 "Advansys ABP-510 ISA SCSI Host Adapter"
 11 ABP0540 "Advansys ABP-540/542 ISA SCSI Host Adapter"
 12 ABP7401 "AdvanSys ABP-740/742 EISA Single Channel SCSI Host Adapter"
 13 ABP7501 "AdvanSys ABP-750/752 EISA Dual Channel SCSI Host Adapter"
 14 ACC1200 "ACCTON EtherCombo-32 Ethernet Adapter"
 15 ACC120A "ACCTON EtherCombo-32 Ethernet Adapter"
 25 ACE7010 "ACME Multi-Function Board"
 39 ACR1711 "AcerFrame 1000 486/33 SYSTEM-2"
 41 ACR3211 "AcerFrame 3000MP 486 SYSTEM-1"
 [all …]
 
 | 
| /linux/drivers/media/dvb-frontends/drx39xyj/ | 
| H A D | drx_dap_fasi.h | 2   Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.48 /*-------- compilation control switches --------------------------------------*/
 53 /*-------- Required includes -------------------------------------------------*/
 57 /*-------- Defines, configuring the API --------------------------------------*/
 98 #error  At least one of short- or long-addressing format must be allowed.
 103 * Single/master multi master setting
 106 * Comments about SINGLE MASTER/MULTI MASTER  modes:
 113 *  + multi master mode means use of repeated starts
 118 * Single/multi master selected via the flags in the FASI protocol.
 121 *  Default is single master, DAP FASI changes multi-master setting silently
 [all …]
 
 | 
| /linux/Documentation/devicetree/bindings/display/ | 
| H A D | multi-inno,mi0283qt.txt | 1 Multi-Inno MI0283QT display panel4 - compatible:	"multi-inno,mi0283qt".
 7 all mandatory properties described in ../spi/spi-bus.txt must be specified.
 10 - dc-gpios:	D/C pin. The presence/absence of this GPIO determines
 12 		- present: IM=x110 4-wire 8-bit data serial interface
 13 		- absent:  IM=x101 3-wire 9-bit data serial interface
 14 - reset-gpios:	Reset pin
 15 - power-supply:	A regulator node for the supply voltage.
 16 - backlight:	phandle of the backlight device attached to the panel
 17 - rotation:	panel rotation in degrees counter clockwise (0,90,180,270)
 [all …]
 
 | 
| /linux/arch/powerpc/kvm/ | 
| H A D | book3s_hv_ras.c | 1 // SPDX-License-Identifier: GPL-2.0-only21 #define SRR1_MC_LDSTERR		(1ul << (63-42))
 22 #define SRR1_MC_IFETCH_SH	(63-45)
 25 #define SRR1_MC_IFETCH_SLBMULTI		3	/* SLB multi-hit */
 26 #define SRR1_MC_IFETCH_SLBPARMULTI	4	/* SLB parity + multi-hit */
 27 #define SRR1_MC_IFETCH_TLBMULTI		5	/* I-TLB multi-hit */
 30 #define DSISR_MC_DERAT_MULTI	0x800		/* D-ERAT multi-hit */
 31 #define DSISR_MC_TLB_MULTI	0x400		/* D-TLB multi-hit */
 33 #define DSISR_MC_SLB_MULTI	0x080		/* SLB multi-hit */
 34 #define DSISR_MC_SLB_PARMULTI	0x040		/* SLB parity + multi-hit */
 [all …]
 
 | 
| /linux/sound/pci/ctxfi/ | 
| H A D | ctresource.c | 1 // SPDX-License-Identifier: GPL-2.0-only21 /* Resource allocation based on bit-map management mechanism */
 24 	     unsigned int multi, unsigned int *ridx)  in get_resource()  argument
 29 	for (i = 0, n = multi; i < amount; i++) {  in get_resource()
 33 			n = multi;  in get_resource()
 36 		if (!(--n))  in get_resource()
 42 		return -ENOENT;  in get_resource()
 45 	/* Mark the contiguous bits in resource bit-map as used */  in get_resource()
 46 	for (n = multi; n > 0; n--) {  in get_resource()
 50 		i--;  in get_resource()
 [all …]
 
 | 
| /linux/arch/sh/mm/ | 
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.012 	  Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
 15 	  On other systems (such as the SH-3 and 4) where an MMU exists,
 26 	  On MMU-less systems, any of these page sizes can be selected
 80 config 29BIT
 81 	def_bool !32BIT
 84 config 32BIT
 89 	bool "Support 32-bit physical addressing through PMB"
 91 	select 32BIT
 95 	  32-bits through the SH-4A PMB. If this is not set, legacy
 [all …]
 
 | 
| /linux/arch/riscv/kernel/ | 
| H A D | cpufeature.c | 1 // SPDX-License-Identifier: GPL-2.0-only24 #include <asm/text-patching.h>
 32 #define NUM_ALPHA_EXTS ('z' - 'a' + 1)
 43 /* Per-cpu ISA extensions. */
 49  * riscv_isa_extension_base() - Get base extension word
 63  * __riscv_isa_extension_available() - Check whether given extension
 67  * @bit: bit position of the desired extension
 72 bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit)  in __riscv_isa_extension_available()  argument
 76 	if (bit >= RISCV_ISA_EXT_MAX)  in __riscv_isa_extension_available()
 79 	return test_bit(bit, bmap);  in __riscv_isa_extension_available()
 [all …]
 
 | 
| /linux/sound/soc/sof/ | 
| H A D | ipc4-topology.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */14 #define SOF_IPC4_FW_PAGE_SIZE BIT(12)
 15 #define SOF_IPC4_FW_PAGE(x) ((((x) + BIT(12) - 1) & ~(BIT(12) - 1)) >> 12)
 16 #define SOF_IPC4_FW_ROUNDUP(x) (((x) + BIT(6) - 1) & (~(BIT(6) - 1)))
 19 #define SOF_IPC4_MODULE_AUTO_START		BIT(4)
 22  * LL domain - Low latency domain
 23  * DP domain - Data processing domain
 26 #define SOF_IPC4_MODULE_LL		BIT(5)
 27 #define SOF_IPC4_MODULE_DP		BIT(6)
 28 #define SOF_IPC4_MODULE_LIB_CODE		BIT(7)
 [all …]
 
 | 
| /linux/Documentation/admin-guide/mm/ | 
| H A D | multigen_lru.rst | 1 .. SPDX-License-Identifier: GPL-2.04 Multi-Gen LRU
 6 The multi-gen LRU is an alternative LRU implementation that optimizes
 26 -----------
 38 0x0001 The main switch for the multi-gen LRU.
 39 0x0002 Clearing the accessed bit in leaf page table entries in large
 42        disabled, the multi-gen LRU will suffer a minor performance
 46 0x0004 Clearing the accessed bit in non-leaf page table entries as
 49        disabled, the multi-gen LRU will suffer a negligible
 65 --------------------
 [all …]
 
 | 
| /linux/include/linux/soundwire/ | 
| H A D | sdw_intel.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */2 /* Copyright(c) 2015-17 Intel Corporation. */
 26 #define SDW_SHIM_LCAP_MLCS_MASK		BIT(8)
 31 #define SDW_SHIM_LCTL_SPA		BIT(0)
 33 #define SDW_SHIM_LCTL_CPA		BIT(8)
 43 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24		(24000 / SDW_CADENCE_GSYNC_KHZ - 1)
 44 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24_576	(24576 / SDW_CADENCE_GSYNC_KHZ - 1)
 45 #define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4		(38400 / SDW_CADENCE_GSYNC_KHZ - 1)
 46 #define SDW_SHIM_SYNC_SYNCPRD_VAL_96		(96000 / SDW_CADENCE_GSYNC_KHZ - 1)
 48 #define SDW_SHIM_SYNC_SYNCCPU		BIT(15)
 [all …]
 
 | 
| /linux/drivers/zorro/ | 
| H A D | zorro.ids | 4 #	Maintained by Geert Uytterhoeven <zorro@linux-m68k.org>12 #	product  product_name				<-- single tab
 23 0200  3-State
 29 	6700  A2386-SX [ISA Bus Bridge]
 38 	4500  A2232 Prototype [Multi I/O]
 39 	4600  A2232 [Multi I/O]
 46 	6700  A2386-SX [ISA Bus Bridge]
 61 03ed  A-Squared
 70 	0300  8-Up (Rev A) [RAM Expansion]
 71 	0400  8-Up (Rev Z) [RAM Expansion]
 [all …]
 
 | 
| /linux/Documentation/input/devices/ | 
| H A D | sentelic.rst | 8 :Copyright: |copy| 2002-2011 Sentelic Corporation.10 :Last update: Dec-07-2011
 27     Bit 7 6 5 4 3 2 1 0       7 6 5 4 3 2 1 0      7 6 5 4 3 2 1 0      7 6 5 4 3 2 1 0
 28     BYTE  |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
 30 	  |---------------|     |---------------|    |---------------|    |---------------|
 34 	    Bit5 => Y sign bit
 35 	    Bit4 => X sign bit
 40     Byte 2: X Movement(9-bit 2's complement integers)
 41     Byte 3: Y Movement(9-bit 2's complement integers)
 43 			valid values, -8 ~ +7
 [all …]
 
 | 
| /linux/drivers/pwm/ | 
| H A D | pwm-bcm-iproc.c | 1 // SPDX-License-Identifier: GPL-2.0-only29 #define IPROC_PWM_PRESCALE_SHIFT(ch)		((3 - (ch)) * \
 50 	value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);  in iproc_pwmc_enable()
 52 	writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);  in iproc_pwmc_enable()
 54 	/* must be a 400 ns delay between clearing and setting enable bit */  in iproc_pwmc_enable()
 62 	value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);  in iproc_pwmc_disable()
 64 	writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);  in iproc_pwmc_disable()
 66 	/* must be a 400 ns delay between clearing and setting enable bit */  in iproc_pwmc_disable()
 74 	u64 tmp, multi, rate;  in iproc_pwmc_get_state()  local
 77 	value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);  in iproc_pwmc_get_state()
 [all …]
 
 | 
| /linux/drivers/gpu/drm/tiny/ | 
| H A D | mi0283qt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later3  * DRM driver for Multi-Inno MI0283QT panels
 47 #define ILI9341_MADCTL_BGR	BIT(3)
 48 #define ILI9341_MADCTL_MV	BIT(5)
 49 #define ILI9341_MADCTL_MX	BIT(6)
 50 #define ILI9341_MADCTL_MY	BIT(7)
 56 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);  in mi0283qt_enable()
 57 	struct mipi_dbi *dbi = &dbidev->dbi;  in mi0283qt_enable()
 61 	if (!drm_dev_enter(pipe->crtc.dev, &idx))  in mi0283qt_enable()
 117 	 * resets only on power-on and not on each reboot through  in mi0283qt_enable()
 [all …]
 
 | 
| /linux/Documentation/sound/cards/ | 
| H A D | cmipci.rst | 2 Brief Notes on C-Media 8338/8738/8768/8770 Driver8 Front/Rear Multi-channel Playback
 9 ---------------------------------
 13 DACs, both streams are handled independently unlike the 4/6ch multi-
 22 - The first DAC supports U8 and S16LE formats, while the second DAC
 24 - The second DAC supports only two channel stereo.
 43   front one) and was so excited.  It was even with "Four Channel" bit
 51 control switch in the driver "Line-In As Rear", which you can change
 52 via alsamixer or somewhat else.  When this switch is on, line-in jack
 60 4/6 Multi-Channel Playback
 [all …]
 
 | 
| /linux/drivers/ata/ | 
| H A D | pata_ftide010.c | 1 // SPDX-License-Identifier: GPL-2.0-only24  * struct ftide010 - state container for the Faraday FTIDE010
 48 	/* Gemini-specific properties */
 76 /* Set this bit for UDMA mode 5 and 6 */
 77 #define FTIDE010_UDMA_TIMING_MODE_56	BIT(7)
 80 #define FTIDE010_CLK_MOD_DEV0_CLK_SEL	BIT(0)
 81 #define FTIDE010_CLK_MOD_DEV1_CLK_SEL	BIT(1)
 83 #define FTIDE010_CLK_MOD_DEV0_UDMA_EN	BIT(4)
 84 #define FTIDE010_CLK_MOD_DEV1_UDMA_EN	BIT(5)
 102  * mdma_50_active_time: array of 4 elements for Td timing for multi
 [all …]
 
 | 
| /linux/tools/perf/pmu-events/arch/x86/amdzen1/ | 
| H A D | floating-point.json | 5     "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.",6 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
 12     "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.",
 13 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
 19     "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.",
 20 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
 26     "BriefDescription": "Total number multi-pipe uOps assigned to pipe 1.",
 27 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
 33     "BriefDescription": "Total number multi-pipe uOps assigned to pipe 0.",
 34 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
 [all …]
 
 | 
| /linux/drivers/firmware/arm_scmi/ | 
| H A D | protocols.h | 1 /* SPDX-License-Identifier: GPL-2.0 */34 #define MSG_SUPPORTS_FASTCHANNEL(x)	((x) & BIT(0))
 44  * struct scmi_msg_resp_prot_version - Response for a message
 61  * struct scmi_msg - Message(Tx/Rx) structure
 72  * struct scmi_msg_hdr - Message(Tx/Rx) header
 94  * struct scmi_xfer - Structure representing a message flow
 99  * @rx: Receive message, the buffer should be pre-allocated to store
 100  *	message. If request-ACK protocol is used, we can reuse the same
 113  *	   though the timed-out transaction will anyway cause the command
 114  *	   request to be reported as failed by time-out, the underlying xfer
 [all …]
 
 | 
| /linux/Documentation/devicetree/bindings/leds/ | 
| H A D | allwinner,sun50i-a100-ledc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---
 4 $id: http://devicetree.org/schemas/leds/allwinner,sun50i-a100-ledc.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 10   - Samuel Holland <samuel@sholland.org>
 13   The LED controller found in Allwinner sunxi SoCs uses a one-wire serial
 19       - const: allwinner,sun50i-a100-ledc
 20       - items:
 21           - enum:
 22               - allwinner,sun20i-d1-ledc
 [all …]
 
 | 
| /linux/drivers/gpu/drm/xe/ | 
| H A D | xe_exec_queue_types.h | 1 /* SPDX-License-Identifier: MIT */25 	XE_EXEC_QUEUE_PRIORITY_UNSET = -2, /* For execlist usage only */
 35  * struct xe_exec_queue - Execution queue
 66 	/** @msix_vec: MSI-X vector (for platforms that support it) */
 72 	 * @last_fence: last fence on exec queue, protected by vm->lock in write
 73 	 * mode if bind exec queue, protected by dma resv lock if non-bind exec
 79 #define EXEC_QUEUE_FLAG_KERNEL			BIT(0)
 81 #define EXEC_QUEUE_FLAG_PERMANENT		BIT(1)
 83 #define EXEC_QUEUE_FLAG_VM			BIT(2)
 84 /* child of VM queue for multi-tile VM jobs */
 [all …]
 
 | 
| /linux/Documentation/fb/ | 
| H A D | viafb.rst | 6 --------15 ---------------
 34 ----------------------
 47 	- 640x480 (default)
 48 	- 720x480
 49 	- 800x600
 50 	- 1024x768
 53 	- 8, 16, 32 (default:32)
 56 	- 60, 75, 85, 100, 120 (default:60)
 59 	- 0 : expansion (default)
 [all …]
 
 | 
| /linux/drivers/iio/dac/ | 
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only33 	  module will be called ad3552r-hs.
 52 	tristate "Analog Devices AD5064 and similar multi-channel DAC driver"
 56 	  AD5045, AD5064, AD5064-1, AD5065, AD5625, AD5625R, AD5627, AD5627R,
 70 	  AD5362, AD5363, AD5370, AD5371, AD5373 multi-channel
 83 	  AD5382, AD5383, AD5384, AD5390, AD5391, AD5392 multi-channel
 93 	  Say yes here to build support for Analog Devices AD5421 loop-powered
 94 	  digital-to-analog converters (DAC).
 172 	  Say yes here to build support for Analog Devices AD9739A Digital-to
 192 	  digital-to-analog (DAC) converters that require either a high-speed
 [all …]
 
 | 
| /linux/drivers/gpu/drm/imagination/ | 
| H A D | pvr_rogue_fwif_client.h | 1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */27  * Minimum PB = Base Pages + (NUM_TE_PIPES-1)*16K + (NUM_VCE_PIPES-1)*64K +
 40  * of 4GB minus the Minimum PB. For convenience we take the smaller power-of-2
 51 /* Use single core in a multi core setup. */
 58 /* Use single core in a multi core setup. */
 78 /*!< Use single core in a multi core setup. */
 85 /*!< Use single core in a multi core setup. */
 209 	/* All values below the ALIGN(8) must be 64 bit. */
 252 	/* Stride IN BYTES for Z-Buffer in case of RTAs. */
 254 	/* Stride IN BYTES for S-Buffer in case of RTAs. */
 [all …]
 
 | 
| /linux/drivers/net/wireless/ath/ath9k/ | 
| H A D | wmi.h | 2  * Copyright (c) 2010-2011 Atheros Communications Inc.45  * 64 - HTC header - WMI header - 1 / txstatus
 51 #define ATH9K_HTC_TXSTAT_ACK        BIT(0)
 52 #define ATH9K_HTC_TXSTAT_FILT       BIT(1)
 53 #define ATH9K_HTC_TXSTAT_RTC_CTS    BIT(2)
 54 #define ATH9K_HTC_TXSTAT_MCS        BIT(3)
 55 #define ATH9K_HTC_TXSTAT_CW40       BIT(4)
 56 #define ATH9K_HTC_TXSTAT_SGI        BIT(5)
 167 	/* multi write section */
 173 	/* multi rmw section */
 [all …]
 
 | 
| /linux/drivers/media/tuners/ | 
| H A D | fc0012.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later5  * Copyright (C) 2012 Hans-Frieder Vogt <hfvogt@gmx.net>
 9 #include "fc0012-priv.h"
 15 		.addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = 2  in fc0012_writereg()
 18 	if (i2c_transfer(priv->i2c, &msg, 1) != 1) {  in fc0012_writereg()
 19 		dev_err(&priv->i2c->dev,  in fc0012_writereg()
 22 		return -EREMOTEIO;  in fc0012_writereg()
 30 		{ .addr = priv->cfg->i2c_address, .flags = 0,  in fc0012_readreg()
 32 		{ .addr = priv->cfg->i2c_address, .flags = I2C_M_RD,  in fc0012_readreg()
 36 	if (i2c_transfer(priv->i2c, msg, 2) != 2) {  in fc0012_readreg()
 [all …]
 
 |