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/linux/Documentation/devicetree/bindings/media/
H A Dmediatek,vcodec-subdev-decoder.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yunfei Dong <yunfei.dong@mediatek.com>
20 +------------------------------------------------+-------------------------------------+
22 | input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output |
24 +------------||-------------||-------------------+---------------------||--------------+
25 || lat || | core workqueue <parent>
26 -------------||-------------||-------------------|---------------------||---------------
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/linux/drivers/media/platform/mediatek/vcodec/common/
H A Dmtk_vcodec_cmn_drv.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <media/v4l2-ctrls.h>
13 #include <media/v4l2-device.h>
14 #include <media/v4l2-ioctl.h>
15 #include <media/v4l2-mem2mem.h>
16 #include <media/videobuf2-core.h>
23 * enum mtk_q_type - Type of queue
31 * enum mtk_hw_reg_idx - MTK hw register base index
55 * struct mtk_vcodec_clk_info - Structure used to store clock name
63 * struct mtk_vcodec_clk - Structure used to store vcodec clock information
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/linux/drivers/media/platform/mediatek/vcodec/decoder/
H A Dmtk_vcodec_dec_hw.c1 // SPDX-License-Identifier: GPL-2.0
22 .compatible = "mediatek,mtk-vcodec-lat",
26 .compatible = "mediatek,mtk-vcodec-core",
30 .compatible = "mediatek,mtk-vcodec-lat-soc",
39 struct platform_device *pdev = vdec_dev->plat_dev; in mtk_vdec_hw_prob_done()
48 of_id->compatible); in mtk_vdec_hw_prob_done()
54 hw_idx = (enum mtk_vdec_hw_id)(uintptr_t)of_id->data; in mtk_vdec_hw_prob_done()
55 if (!test_bit(hw_idx, vdec_dev->subdev_bitmap)) { in mtk_vdec_hw_prob_done()
56 dev_err(&pdev->dev, "vdec %d is not ready", hw_idx); in mtk_vdec_hw_prob_done()
57 return -EAGAIN; in mtk_vdec_hw_prob_done()
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H A Dvdec_msg_queue.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 #include <media/videobuf2-v4l2.h>
23 * enum core_ctx_status - Context decode status for core hardwre.
24 * @CONTEXT_LIST_EMPTY: No buffer queued on core hardware(must always be 0)
25 * @CONTEXT_LIST_QUEUED: Buffer queued to core work list
35 * struct vdec_msg_queue_ctx - represents a queue for buffers ready to be processed
52 * struct vdec_lat_buf - lat buffer message used to store lat info for core decode
55 * @rd_mv_addr: mv addr for av1 lat hardware output, core hardware input
56 * @tile_addr: tile buffer for av1 core input
60 * @private_data: shared information used to lat and core hardware
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H A Dmtk_vcodec_dec_drv.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 #define MTK_VCODEC_DEC_NAME "mtk-vcodec-dec"
32 * enum mtk_vdec_format_types - Structure used to get supported
48 * enum mtk_vdec_hw_count - Supported hardware count
58 * enum mtk_vdec_hw_arch - Used to separate different hardware architecture
66 * struct vdec_pic_info - picture size information
75 * @reserved: align struct to 64-bit in order to adjust 32-bit and 64-bit os.
88 * struct mtk_vcodec_dec_pdata - compatible data for each IC
90 * @ctrls_setup: init vcodec dec ctrls
94 * @cap_to_disp: put capture buffer to disp list for lat and core arch
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/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8192-clk.h>
9 #include <dt-bindings/gce/mt8192-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8192-larb-port.h>
13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14 #include <dt-bindings/phy/phy.h>
15 #include <dt-bindings/power/mt8192-power.h>
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H A Dmt8188.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
8 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/mailbox/mediatek,mt8188-gce.h>
12 #include <dt-bindings/memory/mediatek,mt8188-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
15 #include <dt-bindings/power/mediatek,mt8188-power.h>
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H A Dmt8186.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
6 /dts-v1/;
7 #include <dt-bindings/clock/mt8186-clk.h>
8 #include <dt-bindings/gce/mt8186-gce.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/memory/mt8186-memory-port.h>
12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
13 #include <dt-bindings/power/mt8186-power.h>
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H A Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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