/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | mediatek,mt8192-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek MT8192 Pin Controller 10 - Sean Wang <sean.wang@mediatek.com> 13 The MediaTek's MT8192 Pin controller is used to control SoC pins. 17 const: mediatek,mt8192-pinctrl 19 gpio-controller: true 21 '#gpio-cells': [all …]
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/linux/Documentation/devicetree/bindings/sound/ |
H A D | mt8192-mt6359-rt1015-rt5682.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/mt8192-mt6359-rt1015-rt5682.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek MT8192 with MT6359, RT1015 and RT5682 ASoC sound card driver 10 - Jiaxin Yu <jiaxin.yu@mediatek.com> 11 - Shane Chien <shane.chien@mediatek.com> 14 This binding describes the MT8192 sound card. 17 - $ref: sound-card-common.yaml# 22 - mediatek,mt8192_mt6359_rt1015_rt5682 [all …]
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/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8192-asurada-hayato-r1.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 6 #include "mt8192-asurada.dtsi" 10 chassis-type = "convertible"; 11 compatible = "google,hayato-rev1", "google,hayato", "mediatek,mt8192"; 15 function-row-physmap = < 44 bt_pins: bt-pins { 45 pins-bt-kill { 47 output-low; 50 pins-bt-wake { [all …]
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H A D | mt8192-asurada-spherion-r0.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 6 #include "mt8192-asurada.dtsi" 7 #include <dt-bindings/leds/common.h> 10 model = "Google Spherion (rev0 - 3)"; 11 chassis-type = "laptop"; 12 compatible = "google,spherion-rev3", "google,spherion-rev2", 13 "google,spherion-rev1", "google,spherion-rev0", 14 "google,spherion", "mediatek,mt8192"; 17 compatible = "pwm-leds"; [all …]
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H A D | mt8192.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8192-clk.h> 9 #include <dt-bindings/gce/mt8192-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8192-larb-port.h> 13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h> 14 #include <dt-bindings/phy/phy.h> 15 #include <dt-bindings/power/mt8192-power.h> [all …]
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H A D | mt7988a.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 #include <dt-bindings/clock/mediatek,mt7988-clk.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/phy/phy.h> 6 #include <dt-bindings/pinctrl/mt65xx.h> 7 #include <dt-bindings/reset/mediatek,mt7988-resets.h> 11 interrupt-parent = <&gic>; 12 #address-cells = <2>; 13 #size-cells = <2>; 16 compatible = "mediatek,mt7988-cci", "mediatek,mt8183-cci"; [all …]
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H A D | mt8192-asurada.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 7 #include "mt8192.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/spmi/spmi.h> 25 stdout-path = "serial0:115200n8"; 33 backlight_lcd0: backlight-lcd0 { 34 compatible = "pwm-backlight"; 36 power-supply = <&ppvar_sys>; 37 enable-gpios = <&pio 152 0>; [all …]
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H A D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8195-clk.h> 9 #include <dt-bindings/gce/mt8195-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8195-memory-port.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 15 #include <dt-bindings/power/mt8195-power.h> [all …]
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H A D | mt7986a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/mt7986-clk.h> 10 #include <dt-bindings/reset/mt7986-resets.h> 11 #include <dt-bindings/phy/phy.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 20 #address-cells = <1>; [all …]
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H A D | mt8365.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 10 #include <dt-bindings/clock/mediatek,mt8365-clk.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/memory/mediatek,mt8365-larb-port.h> 14 #include <dt-bindings/phy/phy.h> 15 #include <dt-bindings/power/mediatek,mt8365-power.h> 19 interrupt-parent = <&sysirq>; 20 #address-cells = <2>; 21 #size-cells = <2>; [all …]
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H A D | mt8188.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 /dts-v1/; 8 #include <dt-bindings/clock/mediatek,mt8188-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/mailbox/mediatek,mt8188-gce.h> 12 #include <dt-bindings/memory/mediatek,mt8188-memory-port.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> 15 #include <dt-bindings/power/mediatek,mt8188-power.h> [all …]
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/linux/sound/soc/mediatek/mt8192/ |
H A D | mt8192-afe-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // mt8192-afe-gpio.c -- Mediatek 8192 afe gpio ctrl 9 #include <linux/pinctrl/consumer.h> 11 #include "mt8192-afe-common.h" 12 #include "mt8192-afe-gpio.h" 14 static struct pinctrl *aud_pinctrl; 111 return -EINVAL; in mt8192_afe_gpio_select() 117 return -EIO; in mt8192_afe_gpio_select() 301 return -EINVAL; in mt8192_afe_gpio_request()
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/linux/drivers/pinctrl/mediatek/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 obj-$(CONFIG_EINT_MTK) += mtk-eint.o 4 obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o 5 obj-$(CONFIG_PINCTRL_MTK_V2) += pinctrl-mtk-common-v2.o 6 obj-$(CONFIG_PINCTRL_MTK_MTMIPS) += pinctrl-mtmips.o 7 obj-$(CONFIG_PINCTRL_MTK_MOORE) += pinctrl-moore.o 8 obj-$(CONFIG_PINCTRL_MTK_PARIS) += pinctrl-paris.o 11 obj-$(CONFIG_PINCTRL_AIROHA) += pinctrl-airoha.o 12 obj-$(CONFIG_PINCTRL_MT7620) += pinctrl-mt7620.o 13 obj-$(CONFIG_PINCTRL_MT7621) += pinctrl-mt7621.o [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 2 menu "MediaTek pinctrl drivers" 275 bool "MediaTek MT8192 pin control"
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H A D | pinctrl-mt8192.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include "pinctrl-mtk-mt8192.h" 10 #include "pinctrl-paris.h" 12 /* MT8192 have multiple bases to program pin configuration listed as the below: 1414 { .compatible = "mediatek,mt8192-pinctrl", .data = &mt8192_data }, 1420 .name = "mt8192-pinctrl", 1433 MODULE_DESCRIPTION("MediaTek MT8192 Pinctrl Driver");
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/linux/Documentation/devicetree/bindings/mmc/ |
H A D | mtk-sd.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chaotian Jing <chaotian.jing@mediatek.com> 11 - Wenbin Mei <wenbin.mei@mediatek.com> 16 - enum: 17 - mediatek,mt2701-mmc 18 - mediatek,mt2712-mmc 19 - mediatek,mt6779-mmc [all …]
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/linux/Documentation/devicetree/bindings/serial/ |
H A D | mediatek,uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 13 - $ref: serial.yaml# 23 - const: mediatek,mt6577-uart 24 - items: 25 - enum: 26 - mediatek,mt2701-uart 27 - mediatek,mt2712-uart [all …]
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/linux/drivers/spi/ |
H A D | spi-mt65xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 16 #include <linux/pinctrl/consumer.h> 18 #include <linux/platform_data/spi-mt65xx.h> 21 #include <linux/spi/spi-mem.h> 22 #include <linux/dma-mapping.h> 116 * struct mtk_spi_compatible - device data structure 134 * struct mtk_spi - SPI driver instance 153 * @spimem_done: SPI-MEM operation completion 154 * @use_spimem: Enables SPI-MEM 156 * @tx_dma: DMA start for SPI-MEM TX [all …]
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