Searched +full:mt7988 +full:- +full:ethwarp (Results 1 – 2 of 2) sorted by relevance
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | mediatek,mt7988-ethwarp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt7988-ethwarp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT7988 ethwarp Controller
10 - Daniel Golle <daniel@makrotopia.org>
13 The Mediatek MT7988 ethwarp controller provides clocks and resets for the
14 Ethernet related subsystems found the MT7988 SoC.
15 The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
20 - const: mediatek,mt7988-ethwarp
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt7988-eth.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
13 #include "clk-mtk.h"
14 #include "clk-gate.h"
16 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
17 #include <dt-bindings/reset/mediatek,mt7988-resets.h>
131 { .compatible = "mediatek,mt7988-ethsys", .data = ðdma_desc },
132 { .compatible = "mediatek,mt7988-sgmiisys0", .data = &sgmii0_desc },
133 { .compatible = "mediatek,mt7988-sgmiisys1", .data = &sgmii1_desc },
134 { .compatible = "mediatek,mt7988-ethwarp", .data = ðwarp_desc },
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