Searched +full:mt6577 +full:- +full:uart +full:- +full:dma (Results 1 – 10 of 10) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/dma/mediatek,uart-dma.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: MediaTek UART APDMA controller10 - Long Cheng <long.cheng@mediatek.com>13 The MediaTek UART APDMA controller provides DMA capabilities14 for the UART peripheral bus.17 - $ref: dma-controller.yaml#22 - items:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/serial/mediatek,uart.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: MediaTek Universal Asynchronous Receiver/Transmitter (UART)10 - Matthias Brugger <matthias.bgg@gmail.com>13 - $ref: serial.yaml#16 The MediaTek UART is based on the basic 8250 UART and compatible18 support for DMA.23 - const: mediatek,mt6577-uart[all …]
5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)8 #include <dt-bindings/clock/mt2712-clk.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/memory/mt2712-larb-port.h>12 #include <dt-bindings/phy/phy.h>13 #include <dt-bindings/power/mt2712-power.h>14 #include "mt2712-pinfunc.h"18 interrupt-parent = <&sysirq>;19 #address-cells = <2>;[all …]
6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/clock/mt7622-clk.h>12 #include <dt-bindings/phy/phy.h>13 #include <dt-bindings/power/mt7622-power.h>14 #include <dt-bindings/reset/mt7622-reset.h>15 #include <dt-bindings/thermal/thermal.h>19 interrupt-parent = <&sysirq>;20 #address-cells = <2>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)10 #include <dt-bindings/clock/mediatek,mt8365-clk.h>11 #include <dt-bindings/interrupt-controller/arm-gic.h>12 #include <dt-bindings/interrupt-controller/irq.h>13 #include <dt-bindings/memory/mediatek,mt8365-larb-port.h>14 #include <dt-bindings/phy/phy.h>15 #include <dt-bindings/power/mediatek,mt8365-power.h>19 interrupt-parent = <&sysirq>;20 #address-cells = <2>;21 #size-cells = <2>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only7 #include <dt-bindings/clock/mt8173-clk.h>8 #include <dt-bindings/interrupt-controller/irq.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/memory/mt8173-larb-port.h>11 #include <dt-bindings/phy/phy.h>12 #include <dt-bindings/power/mt8173-power.h>13 #include <dt-bindings/reset/mt8173-resets.h>14 #include <dt-bindings/gce/mt8173-gce.h>15 #include <dt-bindings/thermal/thermal.h>[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 /dts-v1/;8 #include <dt-bindings/clock/mt8192-clk.h>9 #include <dt-bindings/gce/mt8192-gce.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/interrupt-controller/irq.h>12 #include <dt-bindings/memory/mt8192-larb-port.h>13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>14 #include <dt-bindings/phy/phy.h>15 #include <dt-bindings/power/mt8192-power.h>[all …]
1 // SPDX-License-Identifier: GPL-2.08 #include <dt-bindings/clock/mt2701-clk.h>9 #include <dt-bindings/phy/phy.h>10 #include <dt-bindings/power/mt2701-power.h>11 #include <dt-bindings/interrupt-controller/irq.h>12 #include <dt-bindings/interrupt-controller/arm-gic.h>13 #include <dt-bindings/memory/mt2701-larb-port.h>14 #include <dt-bindings/reset/mt2701-resets.h>15 #include "mt2701-pinfunc.h"18 #address-cells = <2>;[all …]
1 // SPDX-License-Identifier: GPL-2.08 #include <dt-bindings/interrupt-controller/irq.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/clock/mt7629-clk.h>11 #include <dt-bindings/power/mt7622-power.h>12 #include <dt-bindings/gpio/gpio.h>13 #include <dt-bindings/phy/phy.h>14 #include <dt-bindings/reset/mt7629-resets.h>18 interrupt-parent = <&sysirq>;19 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.0+19 #include <linux/dma-mapping.h>28 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */31 #define MTK_UART_DMA_EN 0x13 /* DMA Enable register */74 struct uart_8250_dma *dma; member94 struct uart_8250_dma *dma = up->dma; in mtk8250_dma_rx_complete() local95 struct mtk8250_data *data = up->port.private_data; in mtk8250_dma_rx_complete()96 struct tty_port *tty_port = &up->port.state->port; in mtk8250_dma_rx_complete()102 if (data->rx_status == DMA_RX_SHUTDOWN) in mtk8250_dma_rx_complete()105 uart_port_lock_irqsave(&up->port, &flags); in mtk8250_dma_rx_complete()[all …]