Searched +full:mt2712 +full:- +full:uart +full:- +full:dma (Results 1 – 6 of 6) sorted by relevance
5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)8 #include <dt-bindings/clock/mt2712-clk.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/memory/mt2712-larb-port.h>12 #include <dt-bindings/phy/phy.h>13 #include <dt-bindings/power/mt2712-power.h>14 #include "mt2712-pinfunc.h"17 compatible = "mediatek,mt2712";18 interrupt-parent = <&sysirq>;[all …]
1 // SPDX-License-Identifier: GPL-2.08 #include <dt-bindings/clock/mt8516-clk.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/interrupt-controller/irq.h>11 #include <dt-bindings/phy/phy.h>13 #include "mt8516-pinfunc.h"17 interrupt-parent = <&sysirq>;18 #address-cells = <2>;19 #size-cells = <2>;21 cluster0_opp: opp-table-0 {[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/dma/mediatek,uart-dma.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: MediaTek UART APDMA controller10 - Long Cheng <long.cheng@mediatek.com>13 The MediaTek UART APDMA controller provides DMA capabilities14 for the UART peripheral bus.17 - $ref: dma-controller.yaml#22 - items:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/serial/mediatek,uart.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: MediaTek Universal Asynchronous Receiver/Transmitter (UART)10 - Matthias Brugger <matthias.bgg@gmail.com>13 - $ref: serial.yaml#16 The MediaTek UART is based on the basic 8250 UART and compatible18 support for DMA.23 - const: mediatek,mt6577-uart[all …]
1 // SPDX-License-Identifier: GPL-2.08 #include <dt-bindings/interrupt-controller/irq.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/clock/mt7629-clk.h>11 #include <dt-bindings/power/mt7622-power.h>12 #include <dt-bindings/gpio/gpio.h>13 #include <dt-bindings/phy/phy.h>14 #include <dt-bindings/reset/mt7629-resets.h>18 interrupt-parent = <&sysirq>;19 #address-cells = <1>;[all …]
5 ---------------------------------------------------21 W: *Web-page* with status/info23 B: URI for where to file *bugs*. A web-page with detailed bug28 patches to the given subsystem. This is either an in-tree file,29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst46 N: [^a-z]tegra all files whose path contains tegra64 ----------------83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)85 L: linux-scsi@vger.kernel.org88 F: drivers/scsi/3w-*[all …]