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/linux/drivers/gpu/drm/sti/
H A Dsti_mixer.c1 // SPDX-License-Identifier: GPL-2.0
18 /* Module parameter to set the background color of the mixer */
54 const char *sti_mixer_to_str(struct sti_mixer *mixer) in sti_mixer_to_str() argument
56 switch (mixer->id) { in sti_mixer_to_str()
62 return "<UNKNOWN MIXER>"; in sti_mixer_to_str()
66 static inline u32 sti_mixer_reg_read(struct sti_mixer *mixer, u32 reg_id) in sti_mixer_reg_read() argument
68 return readl(mixer->regs + reg_id); in sti_mixer_reg_read()
71 static inline void sti_mixer_reg_write(struct sti_mixer *mixer, in sti_mixer_reg_write() argument
74 writel(val, mixer->regs + reg_id); in sti_mixer_reg_write()
77 #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
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H A Dsti_crtc.c1 // SPDX-License-Identifier: GPL-2.0
27 struct sti_mixer *mixer = to_sti_mixer(crtc); in sti_crtc_atomic_enable() local
31 mixer->status = STI_MIXER_READY; in sti_crtc_atomic_enable()
39 struct sti_mixer *mixer = to_sti_mixer(crtc); in sti_crtc_atomic_disable() local
43 mixer->status = STI_MIXER_DISABLING; in sti_crtc_atomic_disable()
49 sti_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode) in sti_crtc_mode_set() argument
51 struct sti_mixer *mixer = to_sti_mixer(crtc); in sti_crtc_mode_set() local
52 struct device *dev = mixer->dev; in sti_crtc_mode_set()
55 int rate = mode->clock * 1000; in sti_crtc_mode_set()
57 DRM_DEBUG_KMS("CRTC:%d (%s) mode: (%s)\n", in sti_crtc_mode_set()
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H A Dsti_mixer.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 * STI Mixer subdevice structure
33 * @regs: mixer registers
34 * @id: id of the mixer
35 * @drm_crtc: crtc object link to the mixer
36 * @status: to know the status of the mixer
46 const char *sti_mixer_to_str(struct sti_mixer *mixer);
53 int sti_mixer_set_plane_status(struct sti_mixer *mixer,
55 int sti_mixer_set_plane_depth(struct sti_mixer *mixer, struct sti_plane *plane);
56 int sti_mixer_active_video_area(struct sti_mixer *mixer,
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/linux/drivers/gpu/drm/sun4i/
H A Dsun8i_vi_layer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel, in sun8i_vi_layer_update_alpha() argument
26 ch_base = sun8i_channel_base(mixer, channel); in sun8i_vi_layer_update_alpha()
28 if (mixer->cfg->is_de3) { in sun8i_vi_layer_update_alpha()
32 (plane->state->alpha >> 8); in sun8i_vi_layer_update_alpha()
34 val |= (plane->state->alpha == DRM_BLEND_ALPHA_OPAQUE) ? in sun8i_vi_layer_update_alpha()
38 regmap_update_bits(mixer->engine.regs, in sun8i_vi_layer_update_alpha()
42 } else if (mixer->cfg->vi_num == 1) { in sun8i_vi_layer_update_alpha()
43 regmap_update_bits(mixer->engine.regs, in sun8i_vi_layer_update_alpha()
47 (plane->state->alpha >> 8)); in sun8i_vi_layer_update_alpha()
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H A Dsun8i_mixer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/dma-mapping.h>
250 return -EINVAL; in sun8i_mixer_drm_format_to_hw()
255 u32 ch_base = sun8i_channel_base(layer->mixer, layer->channel); in sun8i_layer_enable()
258 if (layer->type == SUN8I_LAYER_TYPE_UI) { in sun8i_layer_enable()
261 reg = SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, layer->overlay); in sun8i_layer_enable()
265 reg = SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, layer->overlay); in sun8i_layer_enable()
268 regmap_update_bits(layer->mixer->engine.regs, reg, mask, val); in sun8i_layer_enable()
275 struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); in sun8i_mixer_commit() local
276 u32 bld_base = sun8i_blender_base(mixer); in sun8i_mixer_commit()
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H A Dsun8i_csc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
111 enum sun8i_csc_mode mode, in sun8i_csc_set_coefficients() argument
121 switch (mode) { in sun8i_csc_set_coefficients()
131 base_reg = SUN8I_CSC_COEFF(base, i - 1); in sun8i_csc_set_coefficients()
138 DRM_WARN("Wrong CSC mode specified.\n"); in sun8i_csc_set_coefficients()
144 enum sun8i_csc_mode mode, in sun8i_de3_ccsc_set_coefficients() argument
154 switch (mode) { in sun8i_de3_ccsc_set_coefficients()
168 i - 1); in sun8i_de3_ccsc_set_coefficients()
176 DRM_WARN("Wrong CSC mode specified.\n"); in sun8i_de3_ccsc_set_coefficients()
208 void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, in sun8i_csc_set_ccsc_coefficients() argument
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/linux/sound/soc/codecs/
H A Dtwl4030.c1 // SPDX-License-Identifier: GPL-2.0-only
28 #include <linux/mfd/twl4030-audio.h>
67 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
79 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte; in tw4030_init_ctl_cache()
89 return -EIO; in twl4030_read()
98 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL]; in twl4030_read()
116 if (twl4030->earpiece_enabled) in twl4030_can_write_to_chip()
120 if (twl4030->predrivel_enabled) in twl4030_can_write_to_chip()
124 if (twl4030->predriver_enabled) in twl4030_can_write_to_chip()
128 if (twl4030->carkitl_enabled) in twl4030_can_write_to_chip()
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H A Dadau1761.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2011-2013 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
125 static const DECLARE_TLV_DB_SCALE(adau1761_sing_in_tlv, -1500, 300, 1);
126 static const DECLARE_TLV_DB_SCALE(adau1761_diff_in_tlv, -1200, 75, 0);
127 static const DECLARE_TLV_DB_SCALE(adau1761_out_tlv, -5700, 100, 0);
128 static const DECLARE_TLV_DB_SCALE(adau1761_sidetone_tlv, -1800, 300, 1);
129 static const DECLARE_TLV_DB_SCALE(adau1761_boost_tlv, -600, 600, 1);
130 static const DECLARE_TLV_DB_SCALE(adau1761_pga_boost_tlv, -2000, 2000, 1);
132 static const DECLARE_TLV_DB_SCALE(adau1761_alc_max_gain_tlv, -1200, 600, 0);
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H A Dmax98095.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max98095.c -- MAX98095 ALSA SoC Audio driver
338 "Off", "Elliptical-HPF-16k", "Butterworth-HPF-16k",
339 "Elliptical-HPF-8k", "Butterworth-HPF-8k", "Butterworth-HPF-Fs/240"};
355 unsigned int sel = ucontrol->value.integer.value[0]; in max98095_mic1pre_set()
357 max98095->mic1pre = sel; in max98095_mic1pre_set()
370 ucontrol->value.integer.value[0] = max98095->mic1pre; in max98095_mic1pre_get()
379 unsigned int sel = ucontrol->value.integer.value[0]; in max98095_mic2pre_set()
381 max98095->mic2pre = sel; in max98095_mic2pre_set()
394 ucontrol->value.integer.value[0] = max98095->mic2pre; in max98095_mic2pre_get()
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H A Dcs42l73.h1 /* SPDX-License-Identifier: GPL-2.0-only */
15 /* I2C Address: 1001010[R/W] - 10010100 = 0x94(Write); 10010101 = 0x95(Read) */
28 #define CS42L73_XSPMMCC 0x0D /* XSP Master Mode Clocking Control. */
30 #define CS42L73_ASPMMCC 0x0F /* ASP Master Mode Clocking Control. */
32 #define CS42L73_VSPMMCC 0x11 /* VSP Master Mode Clocking Control. */
67 #define CS42L73_MIXERCTL 0x34 /* Mixer Control. */
68 #define CS42L73_HLAIPAA 0x35 /* HP/LO Left Mixer: L. */
69 #define CS42L73_HLBIPBA 0x36 /* HP/LO Right Mixer: R. */
70 #define CS42L73_HLAXSPAA 0x37 /* HP/LO Left Mixer: XSP L */
71 #define CS42L73_HLBXSPBA 0x38 /* HP/LO Right Mixer: XSP R */
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H A Dmax98088.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max98088.c -- MAX98088 ALSA SoC Audio driver
63 { 0x11, 0x00 }, /* 11 DAI1 clock mode */
71 { 0x19, 0x00 }, /* 19 DAI2 clock mode */
81 { 0x22, 0x00 }, /* 22 DAC mixer */
82 { 0x23, 0x00 }, /* 23 left ADC mixer */
83 { 0x24, 0x00 }, /* 24 right ADC mixer */
84 { 0x25, 0x00 }, /* 25 left HP mixer */
85 { 0x26, 0x00 }, /* 26 right HP mixer */
87 { 0x28, 0x00 }, /* 28 left REC mixer */
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H A Dmax98090.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max98090.c -- MAX98090 ALSA SoC Audio driver
5 * Copyright 2011-2012 Maxim Integrated Products
46 { 0x14, 0x00 }, /* 14 Digital Mic Mode */
47 { 0x15, 0x00 }, /* 15 Left ADC Mixer */
48 { 0x16, 0x00 }, /* 16 Right ADC Mixer */
54 { 0x1C, 0x00 }, /* 1C Clock Mode */
60 { 0x21, 0x00 }, /* 21 Master Mode */
68 { 0x29, 0x00 }, /* 29 Left HP Mixer */
69 { 0x2A, 0x00 }, /* 2A Right HP Mixer */
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H A Dda7210.c1 // SPDX-License-Identifier: GPL-2.0+
217 u8 mode; /* 0 = slave, 1 = master */ member
222 /* for MASTER mode, fs = 44.1Khz */
230 /* for MASTER mode, fs = 48Khz */
238 /* for SLAVE mode with SRM */
259 * min : 0x11 (-54.0 dB)
261 * reserved : 0x00 - 0x0F
267 /* -54 dB to +15 dB */
268 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
273 /* -54dB to 15dB */
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H A Dak4671.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ak4671.c -- audio driver for AK4671
119 * from -24 to 6 dB in 6 dB steps (mute instead of -30 dB)
121 static DECLARE_TLV_DB_SCALE(out1_tlv, -3000, 600, 1);
125 * from -33 to 6 dB in 3 dB steps (mute instead of -33 dB)
127 static DECLARE_TLV_DB_SCALE(out2_tlv, -3300, 300, 1);
131 * from -6 to 3 dB in 3 dB steps
133 static DECLARE_TLV_DB_SCALE(out3_tlv, -600, 300, 0);
137 * from -15 to 30 dB in 3 dB steps
138 * REVISIT: The actual min value(0x01) is -12 dB and the reg value 0x00 is not
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H A Dmax9867.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright 2013-2015 Maxim Integrated Products
6 // Copyright 2018 Ladislav Michl <ladis@linux-mips.org>
42 "Butterworth/8-24"
55 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in max9867_adc_dac_event()
71 max9867->adc_dac_active |= BIT(adc_dac); in max9867_adc_dac_event()
73 max9867->adc_dac_active &= ~BIT(adc_dac); in max9867_adc_dac_event()
86 ret = regmap_read(max9867->regmap, MAX9867_CODECFLTR, &reg); in max9867_filter_get()
88 return -EINVAL; in max9867_filter_get()
91 ucontrol->value.enumerated.item[0] = 1; in max9867_filter_get()
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H A Dda9055.c1 // SPDX-License-Identifier: GPL-2.0-or-later
58 /* Input - Gain, Select and Filter Registers */
71 /* Output - Gain, Select and Filter Registers */
244 u8 mode; /* 0 = slave, 1 = master */ member
249 /* for MASTER mode, fs = 44.1Khz and its harmonics */
259 /* for MASTER mode, fs = 48Khz and its harmonics */
269 /* for SLAVE mode with SRM */
288 0x0, 0x10, TLV_DB_SCALE_ITEM(-5400, 0, 0),
289 /* -54dB to 15dB */
290 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
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H A Dwm8960.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8960.c -- WM8960 ALSA SoC Audio driver
5 * Copyright 2007-11 Wolfson Microelectronics, plc
29 /* R25 - Power 1 */
33 /* R26 - Power 2 */
38 /* R28 - Anti-pop 1 */
45 /* R29 - Anti-pop 2 */
192 if (wm8960->deemph) { in wm8960_set_deemph()
195 if (abs(deemph_settings[i] - wm8960->lrclk) < in wm8960_set_deemph()
196 abs(deemph_settings[best] - wm8960->lrclk)) in wm8960_set_deemph()
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/linux/Documentation/sound/cards/
H A Dhdspm.rst2 Software Interface ALSA-DSP MADI Driver
5 (translated from German, so no good English ;-),
7 2004 - winfried ritsch
11 the Controls and startup-options are ALSA-Standard and only the
19 ------------------
21 * number of channels -- depends on transmission mode
29 * Single Speed -- 1..64 channels
32 (Note: Choosing the 56channel mode for transmission or as
34 all 64 channels are available for the mixer, so channel count
37 * Double Speed -- 1..32 channels
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/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,admfm2000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kim Seer Paller <kimseer.paller@analog.com>
16 It consists of a LNA, mixer, IF filter, DSA, and IF amplifier for each down
22 - adi,admfm2000
24 '#address-cells':
27 '#size-cells':
31 "^channel@[0-1]$":
44 adi,mixer-mode:
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H A Dadi,admv1013.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
21 - adi,admv1013
26 spi-max-frequency:
34 clock-names:
36 - const: lo_in
38 vcm-supply:
42 vcc-drv-supply:
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/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_mixer.c1 // SPDX-License-Identifier: GPL-2.0-only
12 * -----|------
17 static int lm_right_pair[] = { 1, -1, 5, -1, -1, -1 };
26 return -EINVAL; in get_right_pair_idx()
28 for (i = 0; i < mdp5_kms->num_hwmixers; i++) { in get_right_pair_idx()
29 struct mdp5_hw_mixer *mixer = mdp5_kms->hwmixers[i]; in get_right_pair_idx() local
31 if (mixer->lm == pair_lm) in get_right_pair_idx()
32 return mixer->idx; in get_right_pair_idx()
35 return -1; in get_right_pair_idx()
39 uint32_t caps, struct mdp5_hw_mixer **mixer, in mdp5_mixer_assign() argument
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H A Dmdp5_cmd_encoder.c1 // SPDX-License-Identifier: GPL-2.0-only
15 struct msm_drm_private *priv = encoder->dev->dev_private; in get_kms()
16 return to_mdp5_kms(to_mdp_kms(priv->kms)); in get_kms()
21 struct drm_display_mode *mode) in pingpong_tearcheck_setup() argument
24 struct device *dev = encoder->dev->dev; in pingpong_tearcheck_setup()
27 struct mdp5_hw_mixer *mixer = mdp5_crtc_get_mixer(encoder->crtc); in pingpong_tearcheck_setup() local
28 int pp_id = mixer->pp; in pingpong_tearcheck_setup()
30 if (IS_ERR_OR_NULL(mdp5_kms->vsync_clk)) { in pingpong_tearcheck_setup()
32 return -EINVAL; in pingpong_tearcheck_setup()
35 total_lines = mode->vtotal * drm_mode_vrefresh(mode); in pingpong_tearcheck_setup()
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H A Dmdp5_kms.h1 /* SPDX-License-Identifier: GPL-2.0-only */
61 * - REG_MDP5_DISP_INTF_SEL
104 * display (ex. DSI command mode display)
113 struct mdp5_hw_mixer *mixer; member
114 struct mdp5_hw_mixer *r_mixer; /* right mixer */
123 /* these are derivatives of intf/mixer state in mdp5_pipeline */
131 * encoder has changed this is set to true, since encoder->enable()
134 * writing CTL[n].START until encoder->enable()
157 enum mdp5_intf_mode mode; member
173 WARN_ON(mdp5_kms->enable_count <= 0); in mdp5_write()
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H A Dmdp5_crtc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
33 /* if there is a pending flip, these will be non-null: */
73 struct msm_drm_private *priv = crtc->dev->dev_private; in get_kms()
74 return to_mdp5_kms(to_mdp_kms(priv->kms)); in get_kms()
81 atomic_or(pending, &mdp5_crtc->pending); in request_pending()
82 mdp_irq_register(&get_kms(crtc)->base, &mdp5_crtc->vblank); in request_pending()
88 reinit_completion(&mdp5_crtc->pp_completion); in request_pp_done_pending()
93 struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); in crtc_flush()
94 struct mdp5_ctl *ctl = mdp5_cstate->ctl; in crtc_flush()
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/linux/sound/pci/ca0106/
H A Dca0106.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
12 * Removed noise from Center/LFE channel when in Analog mode.
13 * Rename and remove mixer controls.
50 * Implement support for Line-in capture on SB Live 24bit.
73 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
74 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
87 #define IPR_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
88 #define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
93 #define INTE_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
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