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Searched full:micromips (Results 1 – 22 of 22) sorted by relevance

/linux/arch/mips/include/uapi/asm/
H A Dinst.h347 * (microMIPS) Major opcodes.
369 * (microMIPS) POOL32I minor opcodes.
384 * (microMIPS) POOL32A minor opcodes.
410 * (microMIPS) POOL32B functions.
429 * (microMIPS) POOL32C functions.
440 * (microMIPS) POOL32AXF minor opcodes.
466 * (microMIPS) POOL32F minor opcodes.
490 * (microMIPS) POOL32F secondary minor opcodes.
509 * (microMIPS) POOL32F secondary minor opcodes.
517 * (microMIPS) POOL32F secondary minor opcodes.
[all …]
/linux/arch/mips/vdso/
H A DKconfig2 # of the GOT when targeting microMIPS, which we can't use in the VDSO due to
3 # the lack of relocations. As such, we disable the VDSO for microMIPS builds.
/linux/arch/mips/include/asm/
H A Ddsemul.h14 #define BREAK_MATH(micromips) (((micromips) ? 0x7 : 0xd) | (BRK_MEMU << 16)) argument
H A Duprobes.h22 * Classic MIPS (note this implementation doesn't consider microMIPS yet)
H A Dcompiler.h41 * be branches to code and satisfy linker requirements for microMIPS kernels.
H A Dbranch.h24 * microMIPS bitfields
H A Dinst.h76 /* microMIPS instruction decode structure. Do NOT export!!! */
H A Duaccess.h458 /* micromips memset / bzero also clobbers t7 & t8 */ in __clear_user()
H A Dcpu.h382 #define MIPS_CPU_MICROMIPS BIT_ULL(24) /* CPU has microMIPS capability */
H A Dmipsregs.h1352 * Macros for handling the ISA mode bit for MIPS16 and microMIPS.
1366 * microMIPS instructions can be 16-bit or 32-bit in length. This
/linux/tools/testing/selftests/rseq/
H A Drseq-mips.h17 * On microMIPS:
20 * For nanoMIPS32 and microMIPS, the instruction stream is encoded as 16-bit
/linux/arch/mips/mm/
H A DMakefile20 obj-y += uasm-micromips.o
/linux/arch/mips/kernel/
H A Djump_label.c20 * Define parameters for the standard MIPS and the microMIPS jump
H A Dprocess.c233 * microMIPS is way more fun... in is_ra_save_ins()
326 * microMIPS is kind of more fun... in is_jump_ins()
365 * microMIPS is not more fun... in is_sp_move_ins()
H A Dbranch.c27 * for microMIPS and MIPS16e. It does not clear the ISA mode bit.
56 /* (microMIPS) Convert 16-bit register encoding to 32-bit register encoding. */
257 * Compute return address and emulate branch in microMIPS mode after an
H A Duprobes.c34 * MIPS16 and microMIPS. in arch_uprobe_analyze_insn()
H A Dtraps.c517 /* microMIPS definitions */
1048 /* 16-bit microMIPS BREAK */ in do_bp()
1051 /* 32-bit microMIPS BREAK */ in do_bp()
2032 * would be bad...since we must stay in microMIPS mode. in set_except_vector()
H A Dgenex.S626 /* microMIPS: 0x007d6b3c: rdhwr v1,$29 */
H A Dunaligned.c1559 * Are we running in microMIPS mode? in do_ade()
/linux/scripts/
H A Dxz_wrap.sh17 # mips 2/4 MicroMIPS is 2-byte aligned
/linux/arch/mips/
H A DKconfig2341 prompt "SmartMIPS or microMIPS ASE support"
2346 Select this if you want neither microMIPS nor SmartMIPS support
2362 bool "microMIPS"
2365 microMIPS ISA
/linux/arch/mips/math-emu/
H A Ddsemul.c222 /* microMIPS instructions */ in mips_dsemul()