| /linux/drivers/android/binder/ |
| H A D | context.rs | 38 /// manager.
39 struct Manager { struct
49 manager: Mutex<Manager>, field
59 manager <- kernel::new_mutex!(Manager { in new()
63 }, "Context::manager"), in new()
86 self.manager.lock().all_procs.push(proc, GFP_KERNEL)?; in register_process()
95 let mut manager = self.manager.lock(); in deregister_process() localVariable
96 manager.all_procs.retain(|p| !Arc::ptr_eq(p, proc)); in deregister_process()
101 let len = manager.all_procs.len(); in deregister_process()
102 let cap = manager.all_procs.capacity(); in deregister_process()
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| /linux/drivers/video/fbdev/omap2/omapfb/dss/ |
| H A D | overlay-sysfs.c | 32 ovl->manager ? ovl->manager->name : "<none>"); in overlay_manager_show()
61 DSSDBG("manager %s found\n", mgr->name); in overlay_manager_store()
63 if (mgr == ovl->manager) in overlay_manager_store()
66 old_mgr = ovl->manager; in overlay_manager_store()
72 /* detach old manager */ in overlay_manager_store()
155 if (ovl->manager) { in overlay_position_store()
156 r = ovl->manager->apply(ovl->manager); in overlay_position_store()
194 if (ovl->manager) { in overlay_output_size_store()
195 r = ovl->manager->apply(ovl->manager); in overlay_output_size_store()
261 if (ovl->manager) { in overlay_global_alpha_store()
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| /linux/drivers/md/dm-vdo/ |
| H A D | action-manager.h | 14 * as the block map or slab depot). Each action manager is tied to a specific context for which it
15 * manages actions. The manager ensures that only one action is active on that context at a time,
18 * action manager from a single thread (which thread is determined when the action manager is
46 * A function which is to be applied asynchronously on an action manager's initiator thread as the
54 * A function which will run on the action manager's initiator thread as the conclusion of an
87 vdo_get_current_manager_operation(struct action_manager *manager);
89 void * __must_check vdo_get_current_action_context(struct action_manager *manager);
91 bool vdo_schedule_default_action(struct action_manager *manager);
93 bool vdo_schedule_action(struct action_manager *manager, vdo_action_preamble_fn preamble,
97 bool vdo_schedule_operation(struct action_manager *manager,
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| /linux/drivers/gpu/drm/ |
| H A D | drm_vma_manager.c | 38 * DOC: vma offset manager
40 * The vma-manager is responsible to map arbitrary driver-dependent memory
45 * Drivers shouldn't use this for object placement in VMEM. This manager should
56 * This offset manager works on page-based addresses. That is, every argument
63 * Additionally to offset management, the vma offset manager also handles access
72 * drm_vma_offset_manager_init - Initialize new offset-manager
73 * @mgr: Manager object
77 * Initialize a new offset-manager. The offset and area size available for the
78 * manager are given as @page_offset and @size. Both are interpreted as
81 * Adding/removing nodes from the manager is locked internally and protected
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| /linux/arch/arm/mach-pxa/ |
| H A D | pxa2xx-regs.h | 17 * Power Manager
20 #define PMCR __REG(0x40F00000) /* Power Manager Control Register */
21 #define PSSR __REG(0x40F00004) /* Power Manager Sleep Status Register */
22 #define PSPR __REG(0x40F00008) /* Power Manager Scratch Pad Register */
23 #define PWER __REG(0x40F0000C) /* Power Manager Wake-up Enable Register */
24 #define PRER __REG(0x40F00010) /* Power Manager GPIO Rising-Edge Detect Enable Register */
25 #define PFER __REG(0x40F00014) /* Power Manager GPIO Falling-Edge Detect Enable Register */
26 #define PEDR __REG(0x40F00018) /* Power Manager GPIO Edge Detect Status Register */
27 #define PCFR __REG(0x40F0001C) /* Power Manager General Configuration Register */
28 #define PGSR0 __REG(0x40F00020) /* Power Manager GPIO Sleep State Register for GP[31-0] */
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| H A D | pxa3xx-regs.h | 26 #define PMCR __REG(0x40F50000) /* Power Manager Control Register */
27 #define PSR __REG(0x40F50004) /* Power Manager S2 Status Register */
28 #define PSPR __REG(0x40F50008) /* Power Manager Scratch Pad Register */
29 #define PCFR __REG(0x40F5000C) /* Power Manager General Configuration Register */
30 #define PWER __REG(0x40F50010) /* Power Manager Wake-up Enable Register */
31 #define PWSR __REG(0x40F50014) /* Power Manager Wake-up Status Register */
32 #define PECR __REG(0x40F50018) /* Power Manager EXT_WAKEUP[1:0] Control Register */
34 #define PVCR __REG(0x40F50100) /* Power Manager Voltage Change Control Register */
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| /linux/Documentation/devicetree/bindings/misc/ |
| H A D | intel,ixp4xx-ahb-queue-manager.yaml | 5 $id: http://devicetree.org/schemas/misc/intel,ixp4xx-ahb-queue-manager.yaml#
8 title: Intel IXP4xx AHB Queue Manager
14 The IXP4xx AHB Queue Manager maintains queues as circular buffers in
18 queues from the queue manager with foo-queue = <&qmgr N> where the
19 &qmgr is a phandle to the queue manager and N is the queue resource
26 - const: intel,ixp4xx-ahb-queue-manager
47 qmgr: queue-manager@60000000 {
48 compatible = "intel,ixp4xx-ahb-queue-manager";
|
| H A D | xlnx,tmr-manager.yaml | 4 $id: http://devicetree.org/schemas/misc/xlnx,tmr-manager.yaml#
7 title: Xilinx Triple Modular Redundancy(TMR) Manager IP
13 The Triple Modular Redundancy(TMR) Manager is responsible for handling the
21 - xlnx,tmr-manager-1.0
43 tmr-manager@44a10000 {
44 compatible = "xlnx,tmr-manager-1.0";
|
| /linux/drivers/fpga/ |
| H A D | fpga-mgr.c | 3 * FPGA Manager Core
346 * @mgr: fpga manager
350 * Step the low level fpga manager through the device-specific steps of getting
452 * @mgr: fpga manager
457 * Step the low level fpga manager through the device-specific steps of getting
524 * @mgr: fpga manager
564 * @mgr: fpga manager
688 * Return: fpga manager struct or IS_ERR() condition containing error code.
712 * Return: fpga manager struct or IS_ERR() condition containing error code.
732 * fpga_mgr_put - release a reference to an fpga manager
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| /linux/drivers/accel/habanalabs/common/ |
| H A D | memory_mgr.c | 14 * @mmg: parent unified memory manager
39 * @buf: memory manager buffer descriptor
92 * @buf: memory manager buffer descriptor
106 * @mmg: parent unified memory manager
139 * @mmg: parent unified memory manager
144 * Allocate and register a new memory buffer inside the give memory manager.
224 * @mmg: unified memory manager
302 * hl_mem_mgr_init - initialize unified memory manager
307 * Initialize an instance of unified memory manager
343 * hl_mem_mgr_fini - release unified memory manager
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| /linux/drivers/gpu/drm/vmwgfx/ |
| H A D | vmwgfx_cmdbuf.c | 48 * manager but not yet submitted to hardware.
63 * struct vmw_cmdbuf_man - Command buffer manager
79 * @mm: Range manager for the command buffer space. Manager allocations and
143 * @man: The command buffer manager.
146 * @list: List head for attaching to the manager lists.
147 * @node: The range manager node.
184 * @node: Pointer to the range manager node.
193 /* Loop over each context in the command buffer manager. */
205 * @man: The range manager.
223 * @man: The range manager.
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| H A D | vmwgfx_cmdbuf_res.c | 39 * @hash: Hash entry for the manager hash table.
40 * @head: List head used either by the staging list or the manager list
43 * @man: Pointer to a resource manager for this entry.
54 * struct vmw_cmdbuf_res_manager - Command buffer resource manager.
73 * @man: Pointer to the command buffer resource manager
99 * @man: Pointer to the command buffer resource manager
185 * @man: Pointer to the command buffer resource manager.
192 * resource to the hash table of the manager identified by @man. The
221 * @man: Pointer to the command buffer resource manager.
229 * This function looks up the struct vmw_cmdbuf_res entry from the manager
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_gtt_mgr.c | 34 return container_of(man, struct amdgpu_gtt_mgr, manager); in to_gtt_mgr()
71 struct ttm_resource_manager *man = &adev->mman.gtt_mgr.manager; in amdgpu_mem_info_gtt_used_show()
131 * @man: TTM memory type manager
188 * @man: TTM memory type manager
211 * @mgr: The GTT manager object
246 * @mgr: The GTT manager object
286 * @man: Our manager object
317 * @man: Our manager object
348 * @man: TTM memory type manager
372 * amdgpu_gtt_mgr_init - init GTT manager and DRM MM
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| /linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | ti,k2g-message-manager.yaml | 4 $id: http://devicetree.org/schemas/mailbox/ti,k2g-message-manager.yaml#
7 title: Texas Instruments Message Manager
13 The Texas Instruments Message Manager is a mailbox controller that has
15 Message manager is broken up into queues in different address regions
21 const: ti,k2g-message-manager
60 compatible = "ti,k2g-message-manager";
|
| /linux/drivers/misc/ |
| H A D | xilinx_tmr_manager.c | 3 * Driver for Xilinx TMR Manager IP.
8 * This driver is developed for TMR Manager,The Triple Modular Redundancy(TMR)
9 * Manager is responsible for handling the TMR subsystem state, including
21 /* TMR Manager Register offsets */
44 * struct xtmr_manager_dev - Driver data for TMR Manager
137 * in the tmr manager, update the xtmr_manager cr_val for the same in xtmr_manager_init()
144 * break handler, Below api updates the TMR manager address and in xtmr_manager_init()
192 /* Initialize TMR Manager */ in xtmr_manager_probe()
202 .compatible = "xlnx,tmr-manager-1.0",
219 MODULE_DESCRIPTION("Xilinx TMR Manager Driver");
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| /linux/drivers/gpu/drm/ttm/ |
| H A D | ttm_range_manager.c | 44 * more appropriate to reduce scheduling latency if the range manager
49 struct ttm_resource_manager manager; member
57 return container_of(man, struct ttm_range_manager, manager); in to_range_manager()
168 * ttm_range_man_init_nocheck - Initialise a generic range manager for the
172 * @type: memory manager type
173 * @use_tt: if the memory manager uses tt
176 * The range manager is installed for this device in the type slot.
191 man = &rman->manager; in ttm_range_man_init_nocheck()
201 ttm_set_driver_manager(bdev, type, &rman->manager); in ttm_range_man_init_nocheck()
208 * ttm_range_man_fini_nocheck - Remove the generic range manager from a slot
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| /linux/Documentation/devicetree/bindings/fpga/ |
| H A D | fpga-region.yaml | 71 * In some implementations, the FPGA Manager transparently handles gating the
77 FPGA Manager
78 * An FPGA Manager is a hardware block that programs an FPGA under the control
116 2. Program the FPGA using the FPGA manager.
131 * FPGA Manager
147 reconfiguration. It must include a phandle to an FPGA Manager. The base
158 If an FPGA Region does not specify an FPGA Manager, it will inherit the FPGA
159 Manager specified by its ancestor FPGA Region. This supports both the case
160 where the same FPGA Manager is used for all of an FPGA as well the case where
161 a different FPGA Manager is used for each region.
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| H A D | xlnx,pr-decoupler.yaml | 7 title: Xilinx LogiCORE Partial Reconfig Decoupler/AXI shutdown manager Softcore
21 Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager Softcore
23 eXchange AXI shutdown manager prevents AXI traffic from passing through the
38 - const: xlnx,dfx-axi-shutdown-manager-1.00
39 - const: xlnx,dfx-axi-shutdown-manager
|
| /linux/Documentation/driver-api/fpga/ |
| H A D | fpga-programming.rst | 8 FPGA manager, bridge, and regions. The actual function used to
12 the FPGA manager and bridges. It will:
15 * lock the mutex of the region's FPGA manager
29 When the FPGA region driver probed, it was given a pointer to an FPGA manager
30 driver so it knows which manager to use. The region also either has a list of
95 FPGA Manager flags
98 :doc: FPGA Manager flags
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| /linux/drivers/gpu/drm/xe/ |
| H A D | xe_guc_types.h | 24 * struct xe_guc_db_mgr - GuC Doorbells Manager.
26 * Note: GuC Doorbells Manager is relying on &xe_guc::submission_state.lock
37 * struct xe_guc_id_mgr - GuC context ID Manager.
39 * Note: GuC context ID Manager is relying on &xe_guc::submission_state.lock
63 /** @buf: GuC Buffer Cache manager */
69 /** @dbm: GuC Doorbell Manager */
82 /** @submission_state.idm: GuC context ID Manager */
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| /linux/Documentation/devicetree/bindings/power/supply/ |
| H A D | sbs,sbs-manager.yaml | 4 $id: http://devicetree.org/schemas/power/supply/sbs,sbs-manager.yaml#
7 title: SBS compliant manager
22 - sbs,sbs-manager
24 - const: sbs,sbs-manager
66 batman: battery-manager@a {
67 compatible = "lltc,ltc1760", "sbs,sbs-manager";
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| /linux/Documentation/devicetree/bindings/soc/qcom/ |
| H A D | qcom,saw2.yaml | 7 title: Qualcomm Subsystem Power Manager / SPM AVS Wrapper 2 (SAW2)
14 The Qualcomm Subsystem Power Manager is used to control the peripheral logic
17 The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the
86 saw0: power-manager@f9089000 {
97 power-manager@17812000 {
102 power-manager@17912000 {
111 power-manager@2089000 {
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| /linux/drivers/net/pse-pd/ |
| H A D | pd692x0.c | 831 struct pd692x0_manager *manager, in pd692x0_of_get_ports_manager() argument
850 "wrong number or order of manager ports (%d)\n", in pd692x0_of_get_ports_manager()
857 manager->port_node[port] = node; in pd692x0_of_get_ports_manager()
861 manager->nports = nports; in pd692x0_of_get_ports_manager()
866 of_node_put(manager->port_node[i]); in pd692x0_of_get_ports_manager()
867 manager->port_node[i] = NULL; in pd692x0_of_get_ports_manager()
875 struct pd692x0_manager *manager) in pd692x0_of_get_managers() argument
891 if (!of_node_name_eq(node, "manager")) in pd692x0_of_get_managers()
907 ret = pd692x0_of_get_ports_manager(priv, &manager[manager_id], in pd692x0_of_get_managers()
913 manager[manager_id].node = node; in pd692x0_of_get_managers()
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| /linux/include/linux/power/ |
| H A D | charger-manager.h | 6 * Charger Manager.
54 * @cm: the Charger Manager representing the battery.
62 /* The charger-manager use Extcon framework */
86 * Set if the charger-manager cannot control charger,
126 * @psy_name: the name of power-supply-class for charger manager
141 * charger manager will monitor battery health
209 * @psy_name_buf: the name of power-supply-class for charger manager
210 * @charger_psy: power_supply for charger manager
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-fpga-manager | 5 Description: Name of low level fpga manager driver.
11 Description: Read fpga manager state as a string.
18 This is a superset of FPGA states and fpga manager driver
19 states. The fpga manager driver is walking through these steps
42 Description: Read fpga manager status as a string.
|