| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | pincfg-node.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 21 bias-disable: 23 description: disable any pin bias 25 bias-high-impedance: 27 description: high impedance mode ("third-state", "floating") 29 bias-bus-hold: [all …]
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| H A D | pinctrl-single.txt | 1 One-register-per-pin type device tree based pinctrl driver 4 - compatible : "pinctrl-single" or "pinconf-single". 5 "pinctrl-single" means that pinconf isn't supported. 6 "pinconf-single" means that generic pinconf is supported. 8 - reg : offset and length of the register set for the mux registers 10 - #pinctrl-cells : number of cells in addition to the index, set to 1 11 or 2 for pinctrl-single,pins and set to 2 for pinctrl-single,bits 13 - pinctrl-single,register-width : pinmux register access width in bits 15 - pinctrl-single,function-mask : mask of allowed pinmux function bits 19 - pinctrl-single,function-off : function off mode for disabled state if [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | msm8996-sony-xperia-tone.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/leds/common.h> 15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 16 #include <dt-binding [all...] |
| H A D | apq8016-sbc.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include "msm8916-pm8916.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 13 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 14 #include <dt-bindings/sound/apq8016-lpass.h> 18 compatible = "qcom,apq8016-sbc", "qcom,apq8016"; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | sff,sfp.txt | 1 Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP) 6 - compatible : must be one of 10 - i2c-bus : phandle of an I2C bus controller for the SFP two wire serial 15 - mod-def0-gpios : GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS) 19 - los-gpios : GPIO phandle and a specifier of the Receiver Loss of Signal 22 - tx-fault-gpios : GPIO phandle and a specifier of the Module Transmitter 25 - tx-disable-gpios : GPIO phandle and a specifier of the Transmitter Disable 26 output gpio signal, active (Tx disable) high 28 - rate-select0-gpios : GPIO phandle and a specifier of the Rx Signaling Rate 29 Select (AKA RS0) output gpio signal, low: low Rx rate, high: high Rx rate [all …]
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| H A D | sff,sfp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP) 11 - Russell King <linux@armlinux.org.uk> 16 - sff,sfp # for SFP modules 17 - sff,sff # for soldered down SFF modules 19 i2c-bus: 24 maximum-power-milliwatt: 28 Maximum module power consumption Specifies the maximum power consumption [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt8195-cherry-tomato-r2.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 6 #include "mt8195-cherry.dtsi" 10 compatible = "google,tomato-rev2", "google,tomato", "mediatek,mt8195"; 15 realtek,btndet-delay = <16>; 19 pins-low-power-hdmi-disable { 23 input-enable; 24 bias-pull-down; 27 pins-low-power-hdmi-rsel-disable { 30 input-enable; [all …]
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| H A D | mt8195-cherry-tomato-r3.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 6 #include "mt8195-cherry.dtsi" 9 model = "Acer Tomato (rev3 - 4) board"; 10 compatible = "google,tomato-rev4", "google,tomato-rev3", 16 realtek,amic-delay-ms = <250>; 20 pins-low-power-hdmi-disable { 24 input-enable; 25 bias-pull-down; 28 pins-low-power-hdmi-rsel-disable { [all …]
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| H A D | mt8195-cherry-dojo-r1.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 6 #include "mt8195-cherry.dtsi" 10 chassis-type = "convertible"; 11 compatible = "google,dojo-sku7", "google,dojo-sku5", 12 "google,dojo-sku3", "google,dojo-sku1", 18 realtek,amic-delay-ms = <250>; 25 reset-gpios = <&pio 100 GPIO_ACTIVE_LOW>; 26 sound-name-prefix = "Right"; 27 #sound-dai-cells = <0>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
| H A D | zynqmp-sck-kv-g-revB.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2021, Xilinx, Inc. 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 15 /dts-v1/; 18 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ 19 #address-cells = <1>; 20 #size-cells = <0>; [all …]
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| H A D | zynqmp-sck-kv-g-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2021, Xilinx, Inc. 8 * "A" – A01 board un-modified (NXP) 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/net/ti-dp83867.h> 17 #include <dt-bindings/phy/phy.h> 18 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 /dts-v1/; 23 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ 24 #address-cells = <1>; [all …]
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| H A D | zynqmp-sck-kv-g-revB.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 16 /dts-v1/; 20 compatible = "xlnx,zynqmp-sk-kv260-rev2", 21 "xlnx,zynqmp-sk-kv260-rev1", [all …]
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| H A D | zynqmp-sck-kv-g-revA.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 9 * "A" - A01 board un-modified (NXP) 10 * "Y" - A01 board modified with legacy interposer (Nexperia) 11 * "Z" - A01 board modified with Diode interposer 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/net/ti-dp83867.h> 18 #include <dt-bindings/phy/phy.h> 19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> [all …]
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| H A D | zynqmp-zc1751-xm019-dc5.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm019-dc5 5 * (C) Copyright 2015 - 2021, Xilinx, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 19 model = "ZynqMP zc1751-xm019-dc5 RevA"; 20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; 33 stdout-path = "serial0:115200n8"; [all …]
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| H A D | zynqmp-zc1751-xm016-dc2.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 19 model = "ZynqMP zc1751-xm016-dc2 RevA"; 20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; [all …]
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| H A D | zynqmp-zc1751-xm015-dc1.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/phy/phy.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 model = "ZynqMP zc1751-xm015-dc1 RevA"; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/input/ |
| H A D | iqs626a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jeff LaBundy <jeff@labundy.com> 13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features 14 additional Hall-effect and inductive sensing capabilities. 19 - $ref: touchscreen/touchscreen.yaml# 31 "#address-cells": 34 "#size-cells": 37 azoteq,suspend-mode: [all …]
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| H A D | iqs269a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jef [all...] |
| /freebsd/sys/contrib/alpine-hal/ |
| H A D | al_hal_nb_regs.h | 1 /*- 10 found at http://www.gnu.org/licenses/gpl-2.0.html 101 /* [0x6c] Read-only that reflects CPU Cluster Local GIC base high address */ 103 /* [0x70] Read-only that reflects CPU Cluster Local GIC base low address */ 105 /* [0x74] Read-only that reflects the device's IOGIC base high address. */ 107 /* [0x78] Read-only that reflects IOGIC base low address */ 310 /* [0x20] Specifies the state of the CPU with reference to power modes. */ 346 uint32_t low; member 451 /* Disable broadcast of barrier onto system bus. 457 /* Disable broadcast of cache maintenance system bus. [all …]
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| /freebsd/sys/net/ |
| H A D | sff8472.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2013 George V. Neville-Neil 33 * The following set of constants are from Document SFF-8472 43 * 0-95 Serial ID Defined by SFP MSA 44 * 96-127 Vendor Specific Data 45 * 128-255 Reserved 48 * 0-55 Alarm and Warning Thresholds 49 * 56-95 Cal Constants 50 * 96-119 Real Time Diagnostic Interface [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/arm/tegra/ |
| H A D | nvidia,tegra186-pmc.txt | 1 NVIDIA Tegra Power Management Controller (PMC) 4 - compatible: Should contain one of the following: 5 - "nvidia,tegra186-pmc": for Tegra186 6 - "nvidia,tegra194-pmc": for Tegra194 7 - "nvidia,tegra234-pmc": for Tegra234 8 - reg: Must contain an (offset, length) pair of the register set for each 9 entry in reg-names. 10 - reg-names: Must include the following entries: 11 - "pmc" 12 - "wake" [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx93-tqma9352-mba93xxla.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include <dt-bindings/pwm/pwm.h> 14 #include <dt-bindings/usb/pd.h> 15 #include "imx93-tqma9352.dtsi" [all …]
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| H A D | imx8mn-tqma8mqnl-mba8mx-usbotg.dtso | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2022-2024 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 13 #include "imx8mn-pinfunc.h" 17 compatible = "gpio-usb-b-connector", "usb-b-connector"; 20 pinctrl-names = "default"; 21 pinctrl-0 = <&pinctrl_usb1_connector>; 22 id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/usb/ |
| H A D | pxa-usb.txt | 6 - compatible: Should be "marvell,pxa-ohci" for USB controllers 10 - "marvell,enable-port1", "marvell,enable-port2", "marvell,enable-port3" 12 - "marvell,port-mode" selects the mode of the ports: 16 - "marvell,power-sense-low" - power sense pin is low-active. 17 - "marvell,power-control-low" - power control pin is low-active. 18 - "marvell,no-oc-protection" - disable over-current protection. 19 - "marvell,oc-mode-perport" - enable per-port over-current protection. 20 - "marvell,power_on_delay" Power On to Power Good time - in ms. 25 compatible = "marvell,pxa-ohci"; 28 marvell,enable-port1; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/marvell/ |
| H A D | armada-388-clearfog.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include "armada-388.dtsi" 9 #include "armada-38x-solidrun-microsom.dtsi" 13 /* So that mvebu u-boot can update the MAC addresses */ 20 stdout-path = "serial0:115200n8"; 23 reg_3p3v: regulator-3p3v { 24 compatible = "regulator-fixed"; 25 regulator-name = "3P3V"; 26 regulator-min-microvolt = <3300000>; 27 regulator-max-microvolt = <3300000>; [all …]
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