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Searched full:lcpll (Results 1 – 10 of 10) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dbrcm,iproc-clocks.yaml38 - brcm,ns2-lcpll-ddr
39 - brcm,ns2-lcpll-ports
49 - brcm,sr-lcpll-pcie
203 - brcm,ns2-lcpll-ddr
204 - brcm,ns2-lcpll-ports
262 - brcm,sr-lcpll-pcie
H A Dbrcm,iproc-clocks.txt189 "brcm,ns2-lcpll-ddr"
190 "brcm,ns2-lcpll-ports"
250 "brcm,sr-lcpll-pcie"
H A Dmicrochip,sparx5-dpll.yaml40 lcpll_clk: lcpll-clk {
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Drockchip,rk3588-hdptx-phy.yaml44 - description: LCPLL reset line
54 - const: lcpll
91 reset-names = "phy", "apb", "init", "cmn", "lane", "ropll", "lcpll";
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dbcm-ns2.h54 /* LCPLL DDR clock channel ID */
63 /* LCPLL PORTS clock channel ID */
H A Dbcm-sr.h95 /* LCPLL PCIE clock channel ID */
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/northstar2/
H A Dns2-clock.dtsi43 compatible = "brcm,ns2-lcpll-ddr";
56 compatible = "brcm,ns2-lcpll-ports";
/freebsd/sys/contrib/device-tree/src/arm64/microchip/
H A Dsparx5.dtsi79 lcpll_clk: lcpll-clk {
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-base.dtsi2779 "lcpll";
/freebsd/sys/dev/bxe/
H A Dbxe_elink.c9503 /* Put LCPLL in low power mode */ in elink_warpcore_hw_reset()