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Searched full:lccr0 (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/video/fbdev/
H A Dpxafb.c421 if (!(fbi->lccr0 & LCCR0_LCDT)) { in pxafb_adjust_timing()
559 if (fbi->lccr0 & LCCR0_SDS) in pxafb_pan_display()
1107 if (fbi->lccr0 & LCCR0_SDS) { in setup_base_frame()
1141 lcd_writel(fbi, LCCR0, fbi->reg_lccr0 & ~LCCR0_ENB); in pxafb_smart_flush()
1173 lcd_writel(fbi, LCCR0, fbi->reg_lccr0 | LCCR0_ENB); in pxafb_smart_flush()
1183 lcd_writel(fbi, LCCR0, fbi->reg_lccr0 & ~LCCR0_ENB); in pxafb_smart_flush()
1284 if (!(fbi->lccr0 & LCCR0_LCDT)) in pxafb_smart_init()
1322 if ((fbi->lccr0 & LCCR0_SDS) == LCCR0_Dual) in setup_parallel_timing()
1357 if (fbi->lccr0 & LCCR0_LCDT) in pxafb_activate_var()
1365 fbi->reg_lccr0 = fbi->lccr0 | in pxafb_activate_var()
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H A Dsa1100fb.c652 new_regs.lccr0 = fbi->inf->lccr0 | in sa1100fb_activate_var()
667 if (fbi->inf->lccr0 & LCCR0_Dual) in sa1100fb_activate_var()
681 dev_dbg(fbi->dev, "nlccr0 = 0x%08lx\n", new_regs.lccr0); in sa1100fb_activate_var()
694 fbi->reg_lccr0 = new_regs.lccr0; in sa1100fb_activate_var()
704 if (readl_relaxed(fbi->base + LCCR0) != fbi->reg_lccr0 || in sa1100fb_activate_var()
797 writel_relaxed(fbi->reg_lccr0 & ~LCCR0_LEN, fbi->base + LCCR0); in sa1100fb_enable_controller()
800 writel_relaxed(fbi->reg_lccr0 | LCCR0_LEN, fbi->base + LCCR0); in sa1100fb_enable_controller()
807 dev_dbg(fbi->dev, "LCCR0: 0x%08x\n", readl_relaxed(fbi->base + LCCR0)); in sa1100fb_enable_controller()
816 u32 lccr0; in sa1100fb_disable_controller() local
829 lccr0 = readl_relaxed(fbi->base + LCCR0); in sa1100fb_disable_controller()
[all …]
H A Dsa1100fb.h15 #define LCCR0 0x0000 /* LCD Control Reg. 0 */ macro
27 unsigned long lccr0; member
H A Dpxafb.h127 u_int lccr0; member
H A Dpxa3xx-regs.h8 #define LCCR0 (0x000) /* LCD Controller Control Register 0 */ macro
/linux/Documentation/fb/
H A Dsa1100fb.rst13 video=sa1100fb:bpp:<value>,lccr0:<value>,lccr1:<value>,lccr2:<value>,lccr3:<value>
19 displays are supported as long as the SDS bit is set in LCCR0; GPIO<9:2>
32 lccr0:<value> Configure LCD control register 0 (11.7.3)
/linux/include/video/
H A Dsa1100fb.h52 u_int lccr0; member
/linux/arch/arm/mach-sa1100/
H A Dh3600.c103 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
H A Dassabet.c370 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
396 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
H A Dcollie.c338 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
/linux/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1569 * LCCR0 Liquid Crystal Display (LCD) Control Register 0