Home
last modified time | relevance | path

Searched +full:jpeg +full:- +full:codec (Results 1 – 25 of 26) sorted by relevance

12

/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dexynos-jpeg-codec.txt1 Samsung S5P/Exynos SoC series JPEG codec
5 - compatible : should be one of:
6 "samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg",
7 "samsung,exynos3250-jpeg", "samsung,exynos5420-jpeg",
8 "samsung,exynos5433-jpeg";
9 - reg : address and length of the JPEG codec IP register set;
10 - interrupts : specifies the JPEG codec IP interrupt;
11 - clock-names : should contain:
12 - "jpeg" for the core gate clock,
13 - "sclk" for the special clock (optional).
[all …]
H A Dsamsung,s5pv210-jpeg.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/samsung,s5pv210-jpeg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S5PV210 and Exynos SoC JPEG codec
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Andrzej Pietrasiewicz <andrzejtp2010@gmail.com>
18 - samsung,s5pv210-jpeg
[all …]
H A Drenesas,jpu.txt1 * Renesas JPEG Processing Unit
3 The JPEG processing unit (JPU) incorporates the JPEG codec with an encoding
4 and decoding function conforming to the JPEG baseline process, so that the JPU
5 can encode image data and decode JPEG data quickly.
8 - compatible: "renesas,jpu-<soctype>", "renesas,rcar-gen2-jpu" as fallback.
10 - "renesas,jpu-r8a7790" for R-Car H2
11 - "renesas,jpu-r8a7791" for R-Car M2-W
12 - "renesas,jpu-r8a7792" for R-Car V2H
13 - "renesas,jpu-r8a7793" for R-Car M2-N
15 - reg: Base address and length of the registers block for the JPU.
[all …]
H A Drenesas,jpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas JPEG Processing Unit
10 - Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>
13 The JPEG processing unit (JPU) incorporates the JPEG codec with an encoding
14 and decoding function conforming to the JPEG baseline process, so that the
15 JPU can encode image data and decode JPEG data quickly.
20 - enum:
21 - renesas,jpu-r8a7790 # R-Car H2
[all …]
H A Dcoda.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Chips&Media Coda multi-standard codec IP
10 - Philipp Zabel <p.zabel@pengutronix.de>
12 description: |-
13 Coda codec IPs are present in i.MX SoCs in various versions,
19 - items:
20 - const: fsl,imx27-vpu
21 - const: cnm,codadx6
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am62d2.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
7 * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
10 /dts-v1/;
12 #include "k3-am62a7.dtsi"
19 /delete-node/ &vpu; /* Video Codec is disabled in AM62D2 SoC */
20 /delete-node/ &e5010; /* JPEG Encoder is disabled in AM62D2 SoC */
H A Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
24 #address-cells = <2>;
25 #size-cells = <2>;
27 #interrupt-cells = <3>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/hisilicon/
H A Dhisi-ade.txt1 Device-Tree bindings for hisilicon ADE display controller driver
8 - compatible: value should be "hisilicon,hi6220-ade".
9 - reg: physical base address and length of the ADE controller's registers.
10 - hisilicon,noc-syscon: ADE NOC QoS syscon.
11 - resets: The ADE reset controller node.
12 - interrupt: the ldi vblank interrupt number used.
13 - clocks: a list of phandle + clock-specifier pairs, one for each entry
14 in clock-names.
15 - clock-names: should contain:
18 jpeg codec.
[all …]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Ds5pv210.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
19 #include <dt-bindings/clock/s5pv210.h>
20 #include <dt-bindings/clock/s5pv210-audss.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
45 #address-cells = <1>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a8";
55 xxti: oscillator-0 {
[all …]
H A Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
47 clock-names = "bus";
[all …]
H A Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
46 bus_dmc: bus-dmc {
47 compatible = "samsung,exynos-bus";
[all …]
H A Dexynos4.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dsamsung,exynos850-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
13 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - Tomasz Figa <tomasz.figa@gmail.com>
21 clocks must be defined as fixed-rate clocks in dts.
[all …]
H A Dexynos5433-clock.txt8 - compatible: should be one of the following.
9 - "samsung,exynos5433-cmu-top" - clock controller compatible for CMU_TOP
12 - "samsung,exynos5433-cmu-cpif" - clock controller compatible for CMU_CPIF
14 - "samsung,exynos5433-cmu-mif" - clock controller compatible for CMU_MIF
16 - "samsung,exynos5433-cmu-peric" - clock controller compatible for CMU_PERIC
18 - "samsung,exynos5433-cmu-peris" - clock controller compatible for CMU_PERIS
20 - "samsung,exynos5433-cmu-fsys" - clock controller compatible for CMU_FSYS
22 - "samsung,exynos5433-cmu-g2d" - clock controller compatible for CMU_G2D
24 - "samsung,exynos5433-cmu-disp" - clock controller compatible for CMU_DISP
26 - "samsung,exynos5433-cmu-aud" - clock controller compatible for CMU_AUD
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Danimation2 #------------------------------------------------------------------------------
12 !:mime video/x-sgi-movie
28 !:mime image/x-quicktime
30 #!:mime image/x-quicktime
32 !:mime application/x-quicktime-player
38 # https://aeroquartet.com/wordpress/2016/03/05/3-xavc-s/
39 >8 string XAVC \b, MPEG v4 system, Sony XAVC Codec
51 # https://www.3gpp2.org/Public_html/Specs/C.S0050-B_v1.0_070521.pdf
53 >>11 byte 0x61 \b C.S0050-0 V1.0
54 >>11 byte 0x62 \b C.S0050-0-A V1.0.0
[all …]
H A Driff2 #------------------------------------------------------------------------------
8 # http://www-mmsp.ece.mcgill.ca/Documents/AudioFormats/WAVE/Docs/riffmci.pdf
9 # https://www.iana.org/assignments/wave-avi-codec-registry/wave-avi-codec-registry.xml
13 0 name riff-wave
21 >0 leshort 0x06 \b, ITU G.711 A-law
22 >0 leshort 0x07 \b, ITU G.711 mu-law
115 >0 leshort 0x1100 \b, LH Codec
129 0 name riff-walk
132 >>>8 use riff-wave
134 >>&(4.l+4) use riff-walk
[all …]
H A Darchive1 #------------------------------------------------------------------------------
3 # archive: file(1) magic for archive formats (see also "msdos" for self-
7 # pre-POSIX "tar" archives are also handled in the C code ../../src/is_tar.c.
11 # Reference: https://www.freebsd.org/cgi/man.cgi?query=tar&sektion=5&manpath=FreeBSD+8-current
18 # last 4 header bytes often null but tar\0 in gtarfail2.tar gtarfail.tar-bad
19 # at https://sourceforge.net/projects/s-tar/files/testscripts/
21 # nul, space or ascii digit 0-7 at start of mode
32 >>>>>>>>>0 use tar-nvram
34 #>>>>>>>>0 regex \^[0-9]{2,4}[.](png|jpg|jpeg|tif|tiff|gif|bmp) NAME "%s"
36 # and for name extension case insensitive like: PNG JPG JPEG TIF TIFF GIF BMP
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
[all …]
/freebsd/sys/contrib/device-tree/src/arm/renesas/
H A Dr8a7792.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V2H (R8A77920) SoC
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a7792-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
[all …]
H A Dr8a7790.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H2 (R8A77900) SoC
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7790-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
46 compatible = "fixed-clock";
[all …]
H A Dr8a7791.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7791-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8188.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
8 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/mailbox/mediatek,mt8188-gce.h>
12 #include <dt-bindings/memory/mediatek,mt8188-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
15 #include <dt-bindings/power/mediatek,mt8188-power.h>
[all …]
H A Dmt8183.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/gce/mt8183-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8183-larb-port.h>
13 #include <dt-bindings/power/mt8183-power.h>
14 #include <dt-bindings/reset/mt8183-resets.h>
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Dmt8186.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
6 /dts-v1/;
7 #include <dt-bindings/clock/mt8186-clk.h>
8 #include <dt-bindings/gce/mt8186-gce.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/memory/mt8186-memory-port.h>
12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
13 #include <dt-bindings/power/mt8186-power.h>
[all …]
/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2025-10-18 03:15:01
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
51 7a19 PCI-to-PCI Bridge
57 7a29 PCI-to-PCI Bridge
[all …]

12