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/linux/Documentation/devicetree/bindings/misc/
H A Dfsl,qoriq-mc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/fsl,qoriq-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 The Freescale Management Complex (fsl-mc) is a hardware resource
15 network-oriented packet processing applications. After the fsl-mc
22 For an overview of the DPAA2 architecture and fsl-mc bus see:
26 same hardware "isolation context" and a 10-bit value called an ICID
31 between ICIDs and IOMMUs, so an iommu-map property is used to define
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/linux/Documentation/devicetree/bindings/virtio/
H A Dpci-iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/virtio/pci-iommu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: virtio-iommu device using the virtio-pci transport
10 - Jean-Philippe Brucker <jean-philippe@linaro.org>
13 When virtio-iommu uses the PCI transport, its programming interface is
15 device tree statically describes the relation between IOMMU and DMA
16 masters. Therefore, the PCI root complex that hosts the virtio-iommu
17 contains a child node representing the IOMMU device explicitly.
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/linux/arch/arm64/boot/dts/qcom/
H A Dsc8280xp-el2.dtso1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
12 zap-shader {
18 * When running under QHEE, this IOMMU is controlled by the firmware,
23 iommu-map = <0 &pcie_smmu 0x20000 0x10000>;
27 iommu-map = <0 &pcie_smmu 0x30000 0x10000>;
31 iommu-map = <0 &pcie_smmu 0x40000 0x10000>;
35 iommu-map = <0 &pcie_smmu 0x50000 0x10000>;
39 iommu-map = <0 &pcie_smmu 0x60000 0x10000>;
/linux/Documentation/devicetree/bindings/bus/
H A Dxlnx,versal-net-cdx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/xlnx,versal-net-cdx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 on run-time.
17 All devices on the CDX bus will have a unique streamid (for IOMMU)
20 are used to configure SMMU and GIC-ITS respectively.
22 iommu-map property is used to define the set of stream ids
23 corresponding to each device and the associated IOMMU.
26 The msi-map property is used to associate the devices with the
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/linux/arch/sparc/kernel/
H A Diommu.c1 // SPDX-License-Identifier: GPL-2.0
2 /* iommu.c: Generic sparc64 IOMMU support.
13 #include <linux/dma-map-ops.h>
15 #include <linux/iommu-helper.h>
17 #include <asm/iommu-common.h>
23 #include <asm/iommu.h>
29 ((STC)->strbuf_ctxmatch_base + ((CTX) << 3))
31 (*((STC)->strbuf_flushflag) = 0UL)
33 (*((STC)->strbuf_flushflag) != 0UL)
49 /* Must be invoked under the IOMMU lock. */
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H A Diommu-common.c1 // SPDX-License-Identifier: GPL-2.0
3 * IOMMU mmap management and range allocation functions.
4 * Based almost entirely upon the powerpc iommu allocator.
10 #include <linux/iommu-helper.h>
11 #include <linux/dma-mapping.h>
13 #include <asm/iommu-common.h>
19 static inline bool need_flush(struct iommu_map_table *iommu) in need_flush() argument
21 return ((iommu->flags & IOMMU_NEED_FLUSH) != 0); in need_flush()
24 static inline void set_flush(struct iommu_map_table *iommu) in set_flush() argument
26 iommu->flags |= IOMMU_NEED_FLUSH; in set_flush()
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/linux/Documentation/devicetree/bindings/pci/
H A Dpci-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/pci-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 - Kishon Vijay Abraham I <kishon@kernel.org>
14 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
18 pattern: "^pcie-ep@"
20 iommu-map:
21 $ref: /schemas/types.yaml#/definitions/uint32-matrix
24 - description: Device ID (see msi-map) base
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H A Dapple,pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Kettenis <kettenis@openbsd.org>
26 the standard "reset-gpios" and "max-link-speed" properties appear on
38 - items:
39 - enum:
40 - apple,t8103-pcie
41 - apple,t8112-pcie
42 - apple,t6000-pcie
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/linux/arch/arm64/boot/dts/arm/
H A Dmorello-sdp.dts1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (c) 2021-2024, Arm Limited. All rights reserved.
6 /dts-v1/;
11 compatible = "arm,morello-sdp", "arm,morello";
18 stdout-path = "serial0:115200n8";
21 dpu_aclk: clock-350000000 {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <350000000>;
26 clock-output-names = "aclk";
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/linux/drivers/iommu/
H A Dmsm_iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
13 #include <linux/io-pgtable.h>
18 #include <linux/iommu.h>
25 #include "msm_iommu_hw-8xxx.h"
54 static int __enable_clocks(struct msm_iommu_dev *iommu) in __enable_clocks() argument
58 ret = clk_enable(iommu->pclk); in __enable_clocks()
62 if (iommu->clk) { in __enable_clocks()
63 ret = clk_enable(iommu->clk); in __enable_clocks()
65 clk_disable(iommu->pclk); in __enable_clocks()
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H A Dof_iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OF helpers for IOMMU
9 #include <linux/iommu.h>
20 #include "iommu-priv.h"
28 if (!of_device_is_available(iommu_spec->np)) in of_iommu_xlate()
29 return -ENODEV; in of_iommu_xlate()
31 ret = iommu_fwspec_init(dev, of_fwnode_handle(iommu_spec->np)); in of_iommu_xlate()
35 ops = iommu_ops_from_fwnode(&iommu_spec->np->fwnode); in of_iommu_xlate()
36 if (!ops->of_xlate || !try_module_get(ops->owner)) in of_iommu_xlate()
37 return -ENODEV; in of_iommu_xlate()
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H A Dsun50i-iommu.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 // Copyright (C) 2016-2018, Allwinner Technology CO., LTD.
3 // Copyright (C) 2019-2020, Cerno
9 #include <linux/dma-direction.h>
10 #include <linux/dma-mapping.h>
14 #include <linux/iommu.h>
29 #include "iommu-pages.h"
101 struct iommu_device iommu; member
103 /* Lock to modify the IOMMU registers */
125 struct sun50i_iommu *iommu; member
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/linux/arch/powerpc/boot/dts/fsl/
H A Dp5020si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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H A Dp3041si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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H A Dp2041si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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H A Dp5040si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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H A Dp4080si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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/linux/arch/sparc/mm/
H A Diommu.c1 // SPDX-License-Identifier: GPL-2.0
3 * iommu.c: IOMMU specific routines for memory management.
15 #include <linux/dma-map-ops.h>
26 #include <asm/iommu.h>
60 struct iommu_struct *iommu; in sbus_iommu_init() local
67 iommu = kmalloc(sizeof(struct iommu_struct), GFP_KERNEL); in sbus_iommu_init()
68 if (!iommu) { in sbus_iommu_init()
69 prom_printf("Unable to allocate iommu structure\n"); in sbus_iommu_init()
73 iommu->regs = of_ioremap(&op->resource[0], 0, PAGE_SIZE * 3, in sbus_iommu_init()
75 if (!iommu->regs) { in sbus_iommu_init()
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/linux/drivers/acpi/arm64/
H A Diort.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/iommu.h>
21 #include <linux/dma-map-ops.h>
45 * iort_set_fwnode() - Create iort_fwnode and use it to register
46 * iommu data in the iort_fwnode_list
48 * @iort_node: IORT table node associated with the IOMMU
62 return -ENOMEM; in iort_set_fwnode()
64 INIT_LIST_HEAD(&np->list); in iort_set_fwnode()
65 np->iort_node = iort_node; in iort_set_fwnode()
66 np->fwnode = fwnode; in iort_set_fwnode()
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/
H A Dgk20a.c30 * 1) If an IOMMU unit has been probed, the IOMMU API is used to make memory
32 * 2) If no IOMMU unit is probed, the DMA API is used to allocate physically
35 * In both cases CPU read and writes are performed by creating a write-combined
74 * Used for objects flattened using the IOMMU API
86 /* array of base.mem->size pages (+ dma_addr_ts) */
103 /* Only used if IOMMU if present */
130 return (u64)gk20a_instobj(memory)->mn->offset << 12; in gk20a_instobj_addr()
136 return (u64)gk20a_instobj(memory)->mn->length << 12; in gk20a_instobj_size()
145 struct gk20a_instmem *imem = obj->base.imem; in gk20a_instobj_iommu_recycle_vaddr()
147 WARN_ON(obj->use_cpt); in gk20a_instobj_iommu_recycle_vaddr()
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/linux/Documentation/userspace-api/
H A Diommufd.rst1 .. SPDX-License-Identifier: GPL-2.0+
13 IOMMUFD is the user API to control the IOMMU subsystem as it relates to managing
16 drivers are eventually expected to deprecate any internal IOMMU logic
20 I/O page tables for all IOMMUs, with room in the design to add non-generic
24 small letter (iommufd) refers to the file descriptors created via /dev/iommu for
31 --------------------
35 - IOMMUFD_OBJ_IOAS, representing an I/O address space (IOAS), allowing map/unmap
39 container it copies an IOVA map to a list of iommu_domains held within it.
41 - IOMMUFD_OBJ_DEVICE, representing a device that is bound to iommufd by an
44 - IOMMUFD_OBJ_HWPT_PAGING, representing an actual hardware I/O page table
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/linux/Documentation/devicetree/bindings/iommu/
H A Driscv,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iommu/riscv,iommu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V IOMMU Architecture Implementation
10 - Tomasz Jeznach <tjeznach@rivosinc.com>
13 The RISC-V IOMMU provides memory address translation and isolation for
14 input and output devices, supporting per-device translation context,
17 It supports identical translation table format to the RISC-V address
19 Hardware uses in-memory command and fault reporting queues with wired
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/linux/drivers/iommu/intel/
H A Ddmar.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2006-2008 Intel Corporation
14 * These routines are used by both DMA-remapping and Interrupt-remapping
28 #include <linux/iommu.h>
33 #include "iommu.h"
35 #include "../iommu-pages.h"
50 * 1) The hotplug framework guarentees that DMAR unit will be hot-added
52 * 2) The hotplug framework guarantees that DMAR unit will be hot-removed
68 static void free_iommu(struct intel_iommu *iommu);
76 if (drhd->include_all) in dmar_register_drhd_unit()
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/linux/lib/
H A Diommu-helper.c1 // SPDX-License-Identifier: GPL-2.0
3 * IOMMU helper functions for the free area management
7 #include <linux/iommu-helper.h>
9 unsigned long iommu_area_alloc(unsigned long *map, unsigned long size, in iommu_area_alloc() argument
17 size -= 1; in iommu_area_alloc()
19 index = bitmap_find_next_zero_area(map, size, start, nr, align_mask); in iommu_area_alloc()
22 start = ALIGN(shift + index, boundary_size) - shift; in iommu_area_alloc()
25 bitmap_set(map, index, nr); in iommu_area_alloc()
28 return -1; in iommu_area_alloc()
/linux/drivers/gpu/drm/msm/
H A Dmsm_iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/adreno-smmu-priv.h>
8 #include <linux/io-pgtable.h>
45 /* based on iommu_pgsize() in iommu.c: */
56 pgsizes = pagetable->pgsize_bitmap & GENMASK(__fls(size), 0); in calc_pgsize()
72 pgsizes = pagetable->pgsize_bitmap & ~GENMASK(pgsize_idx, 0); in calc_pgsize()
83 if ((iova ^ paddr) & (pgsize_next - 1)) in calc_pgsize()
87 offset = pgsize_next - (addr_merge & (pgsize_next - 1)); in calc_pgsize()
105 struct io_pgtable_ops *ops = pagetable->pgtbl_ops; in msm_iommu_pagetable_unmap()
114 unmapped = ops->unmap_pages(ops, iova, pgsize, count, NULL); in msm_iommu_pagetable_unmap()
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