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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp131.dtsi6 #include <dt-bindings/interrupt-controller/arm-gic.h>
28 interrupt-affinity = <&cpu0>;
29 interrupt-parent = <&intc>;
36 interrupt-parent = <&intc>;
80 intc: interrupt-controller@a0021000 {
82 #interrupt-cells = <3>;
83 interrupt-controller;
99 interrupt-parent = <&intc>;
107 interrupt-parent = <&intc>;
116 interrupt-names = "global";
[all …]
H A Dste-nomadik-stn8815.dtsi21 interrupt-parent = <&vica>;
38 interrupt-parent = <&vica>;
47 interrupt-parent = <&vica>;
56 interrupt-parent = <&vica>;
58 interrupt-controller;
59 #interrupt-cells = <2>;
70 interrupt-parent = <&vica>;
72 interrupt-controller;
73 #interrupt-cells = <2>;
84 interrupt
[all...]
H A Dstm32mp151.dtsi6 #include <dt-bindings/interrupt-controller/arm-gic.h>
29 interrupt-affinity = <&cpu0>;
30 interrupt-parent = <&intc>;
38 intc: interrupt-controller@a0021000 {
40 #interrupt-cells = <3>;
41 interrupt-controller;
52 interrupt-parent = <&intc>;
123 interrupt-parent = <&intc>;
134 interrupt-names = "rx", "tx";
175 exti: interrupt-controller@5000d000 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1043a.dtsi13 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
284 interrupt-affinity = <&cpu0>,
290 gic: interrupt-controller@1400000 {
292 #interrupt-cells = <3>;
293 interrupt-controller;
324 extirq: interrupt-controller@1ac {
326 #interrupt-cells = <2>;
328 interrupt-controller;
330 interrupt-map =
[all …]
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dintel,ce4100-ioapic.txt1 Interrupt chips
4 * Intel I/O Advanced Programmable Interrupt Controller (IO APIC)
9 #interrupt-cells = <2>;
11 Device's interrupt property:
15 The first number (P) represents the interrupt pin which is wired to the
16 IO APIC. The second number (S) represents the sense of interrupt which
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j721e-main.dtsi147 gic500: interrupt-controller@1800000 {
152 #interrupt-cells = <3>;
153 interrupt-controller;
160 /* vcpumntirq: virtual CPU interface maintenance interrupt */
172 main_gpio_intr: interrupt-controller@a00000 {
176 interrupt-controller;
177 interrupt-parent = <&gic500>;
178 #interrupt-cells = <1>;
181 ti,interrupt-ranges = <8 392 56>;
194 main_navss_intr: interrupt-controller@310e0000 {
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Dar9331.txt13 - interrupt-parent: Phandle to the parent interrupt controller
15 - interrupt-controller: Indicates the switch is itself an interrupt
17 - #interrupt-cells: must be 1
67 interrupt-parent = <&miscintc>;
70 interrupt-controller;
71 #interrupt-cells = <1>;
118 interrupt-parent = <&switch10>;
/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dqcom,qcs404-cdsp-pil.yaml28 - description: Watchdog interrupt
29 - description: Fatal interrupt
30 - description: Ready interrupt
31 - description: Handover interrupt
32 - description: Stop acknowledge interrupt
34 interrupt-names:
105 - interrupt-names
120 #include <dt-bindings/interrupt-controller/arm-gic.h>
133 interrupt-names = "wdog", "fatal", "ready",
/freebsd/sys/contrib/device-tree/src/mips/mscc/
H A Docelot.dtsi25 cpuintc: interrupt-controller {
27 #interrupt-cells = <1>;
28 interrupt-controller;
29 compatible = "mti,cpu-interrupt-controller";
52 interrupt-parent = <&intc>;
59 intc: interrupt-controller@70 {
62 #interrupt-cells = <1>;
63 interrupt-controller;
64 interrupt-parent = <&cpuintc>;
146 interrupt-names = "ptp_rdy", "xtr", "inj", "fdma";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dnvidia,tegra186-gpio.yaml60 Each GPIO controller can generate a number of interrupt signals. Each
62 ports. Thus, the number of interrupt signals generated by a controller
69 one of the interrupt signals generated by a set-of-ports. The intent is
108 description: The interrupt outputs from the HW block, one per set of
127 interrupt-controller: true
129 "#interrupt-cells":
131 Indicates how many cells are used in a consumer's interrupt specifier.
185 #include <dt-bindings/interrupt-controller/irq.h>
200 interrupt-controller;
201 #interrupt-cells = <2>;
[all …]
H A Dgpio-xlp.txt24 - interrupt-cells: Should be two. The first cell is the GPIO Number. The
32 - interrupts: Interrupt number for this device.
33 - interrupt-controller: Identifies the node as an interrupt controller.
45 #interrupt-cells = <2>;
46 interrupt-parent = <&pic>;
48 interrupt-controller;
/freebsd/sys/contrib/device-tree/Bindings/soc/dove/
H A Dpmu.txt8 - interrupts: single interrupt number for the PMU interrupt
9 - interrupt-controller: must be specified as the PMU itself is an
10 interrupt controller.
11 - #interrupt-cells: must be 1.
37 interrupt-controller;
38 #interrupt-cells = <1>;
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmicrochip,enc28j60.txt11 - interrupts: Specify the interrupt index within the interrupt controller (referred
12 to above in interrupt-parent) and interrupt type. The ENC28J60 natively
16 - pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,
40 interrupt-parent = <&gpio3>;
50 MX28_PAD_AUART0_RTS__GPIO_3_3 /* Interrupt */
H A Dnixge.txt12 - interrupts: Should contain tx and rx interrupt
13 - interrupt-names: Should be "rx" and "tx"
35 interrupt-names = "rx", "tx";
36 interrupt-parent = <&intc>;
58 interrupt-names = "rx", "tx";
59 interrupt-parent = <&intc>;
74 interrupt-names = "rx", "tx";
75 interrupt-parent = <&intc>;
/freebsd/sys/contrib/device-tree/Bindings/perf/
H A Darm,cmn.yaml30 - description: Overflow interrupt for DTC0
31 - description: Overflow interrupt for DTC1
32 - description: Overflow interrupt for DTC2
33 - description: Overflow interrupt for DTC3
34 description: One interrupt for each DTC domain implemented must
61 #include <dt-bindings/interrupt-controller/arm-gic.h>
62 #include <dt-bindings/interrupt-controller/irq.h>
/freebsd/sys/powerpc/booke/
H A Dtrap_subr.S92 * Standard interrupt prolog
96 * isrr0-1 - save restore registers with CPU state at interrupt time (may be
126 mfspr %r31, isrr1; /* MSR at interrupt time */ \
133 mtcr %r31; /* MSR at interrupt time */ \
149 mfspr %r31, isrr1; /* MSR at interrupt time */ \
153 mfspr %r31, SPR_SRR1; /* MSR at interrupt time */ \
160 mtcr %r31; /* MSR at interrupt time */ \
168 * SPRG{1-3} SP at the time interrupt occurred
174 * sprg_sp - SPRG reg containing SP at the time interrupt occurred
180 * - R0, R1 (SP at the time of interrupt), R2, LR, CR
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/hisilicon/
H A Dhip07.dtsi8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
940 gic: interrupt-controller@4d000000 {
942 #interrupt-cells = <3>;
946 interrupt-controller;
1065 p0_mbigen_peri_b: interrupt-controller@60080000 {
1071 interrupt-controller;
1072 #interrupt-cells = <2>;
1077 p0_mbigen_pcie_a: interrupt-controller@a0080000 {
1083 interrupt-controller;
[all …]
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300reg.h37 #define AR_CR_SWI 0x00000040 // One-shot software interrupt
65 /* Mac Interrupt rate threshold register */
70 /* MAC Global Interrupt enable register */
72 #define AR_IER_ENABLE 0x00000001 // Global interrupt enable
73 #define AR_IER_DISABLE 0x00000000 // Global interrupt disable
75 /* Mac Tx Interrupt mitigation threshold */
82 /* Mac Rx Interrupt mitigation threshold */
187 /* MAC Interrupt Config register */
189 #define AR_INTCFG_REQ 0x00000001 // Interrupt request flag
191 // an interrupt upon completion of the frame
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dpci-rcar-gen2.txt28 - interrupts: interrupt for the device.
34 - #interrupt-cells: must be 1.
35 - interrupt-map: standard property used to define the mapping of the PCI
37 - interrupt-map-mask: standard property that helps to define the interrupt
58 #interrupt-cells = <1>;
60 interrupt-map-mask = <0xff00 0 0 0x7>;
61 interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
/freebsd/sys/contrib/device-tree/src/c6x/
H A Dtms320c6455.dtsi25 core_pic: interrupt-controller {
26 interrupt-controller;
27 #interrupt-cells = <1>;
32 * Megamodule interrupt controller
34 megamod_pic: interrupt-controller@1800000 {
36 interrupt-controller;
37 #interrupt-cells = <1>;
39 interrupt-parent = <&core_pic>;
/freebsd/sys/contrib/device-tree/src/arm64/apple/
H A Dt600x-j314-j316.dtsi62 interrupt-parent = <&pinctrl_ap>;
64 interrupt-names = "irq";
70 interrupt-parent = <&pinctrl_ap>;
72 interrupt-names = "irq";
78 interrupt-parent = <&pinctrl_ap>;
80 interrupt-names = "irq";
87 interrupt-parent = <&pinctrl_ap>;
89 interrupt-names = "irq";
H A Dt600x-j375.dtsi48 interrupt-parent = <&pinctrl_ap>;
50 interrupt-names = "irq";
56 interrupt-parent = <&pinctrl_ap>;
58 interrupt-names = "irq";
64 interrupt-parent = <&pinctrl_ap>;
66 interrupt-names = "irq";
72 interrupt-parent = <&pinctrl_ap>;
74 interrupt-names = "irq";
/freebsd/sys/contrib/device-tree/Bindings/display/
H A Dbrcm,bcm2711-hdmi.yaml58 - description: CEC TX interrupt
59 - description: CEC RX interrupt
60 - description: CEC stuck at low interrupt
61 - description: Wake-up interrupt
62 - description: Hotplug connected interrupt
63 - description: Hotplug removed interrupt
65 interrupt-names:
83 as an interrupt/status bit in the HDMI controller itself)
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Drohm,bd9571mwv.yaml24 interrupt-controller: true
26 '#interrupt-cells':
86 - interrupt-controller
87 - '#interrupt-cells'
99 #include <dt-bindings/interrupt-controller/irq.h>
108 interrupt-parent = <&gpio2>;
110 interrupt-controller;
111 #interrupt-cells = <2>;
H A Dst,stmfx.yaml41 "#interrupt-cells":
46 interrupt-controller: true
81 - "#interrupt-cells"
83 - interrupt-controller
95 #include <dt-bindings/interrupt-controller/arm-gic.h>
103 interrupt-parent = <&gpioi>;
109 #interrupt-cells = <2>;
111 interrupt-controller;

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