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/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc4357-ea4357-devkit.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "ea,lpc4357-developers-kit", "nxp,lpc4357", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "regulator-fixed";
43 regulator-name = "3v3-supply";
44 regulator-min-microvolt = <3300000>;
45 regulator-max-microvolt = <3300000>;
[all …]
H A Dlpc4350-hitex-eval.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "gpio-keys-polled";
43 poll-interval = <100>;
97 compatible = "gpio-leds";
102 linux,default-trigger = "heartbeat";
[all …]
H A Dlpc4337-ciaa.dts2 * CIAA NXP LPC4337 (http://www.proyecto-ciaa.com.ar)
4 * Copyright (C) 2015 VanguardiaSur - www.vanguardiasur.com.ar
9 * Released under the terms of 3-clause BSD License
12 /dts-v1/;
17 #include "dt-bindings/gpio/gpio.h"
30 stdout-path = &uart2;
40 enet_rmii_pins: enet-rmii-pins {
44 slew-rate = <1>;
45 bias-disable;
46 input-enable;
[all …]
H A Dlpc4357-myd-lpc4357.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * MYIR Tech MYD-LPC4357 Development Board with 800x480 7" TFT panel
5 * Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
8 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "myir,myd-lpc4357", "nxp,lpc4357";
20 stdout-path = "serial3:115200n8";
29 compatible = "gpio-leds";
30 pinctrl-names = "default";
31 pinctrl-0 = <&led_pins>;
[all …]
/linux/arch/riscv/boot/dts/starfive/
H A Djh7100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
21 stdout-path = "serial0:115200n8";
25 timebase-frequency = <6250000>;
34 compatible = "gpio-leds";
36 led-ack {
40 linux,default-trigger = "heartbeat";
[all …]
H A Djh7110-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h>
27 stdout-path = "serial0:115200n8";
33 bootph-pre-ram;
36 gpio-restart {
37 compatible = "gpio-restart";
[all …]
H A Djh7110-deepcomputing-fml13v01.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 /dts-v1/;
7 #include "jh7110-common.dtsi"
15 perst-gpios = <&sysgpio 21 GPIO_ACTIVE_LOW>;
17 pinctrl-names = "default";
18 pinctrl-0 = <&pcie1_pins>;
23 pcie1_pins: pcie1-0 {
24 clkreq-pins {
28 bias-pull-down;
29 drive-strength = <2>;
[all …]
/linux/arch/arm64/boot/dts/marvell/mmp/
H A Dpxa1908-samsung-coreprimevelte.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/linux-event-codes.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
21 stdout-path = "serial0:115200n8";
24 compatible = "simple-framebuffer";
39 reserved-memory {
40 #address-cells = <2>;
41 #size-cells = <2>;
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dstarfive,jh7100-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Bindings for the JH7100 RISC-V SoC from StarFive Ltd.
14 configurable bias, drive strength, schmitt trigger etc. The SoC has an
15 interesting 2-layered approach to pin muxing best illustrated by the diagram
21 LCD output -----------------| |
22 CMOS Camera interface ------| |--- PAD_GPIO[0]
23 Ethernet PHY interface -----| MUX |--- PAD_GPIO[1]
[all …]
H A Dstarfive,jh7110-sys-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-sys-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd.
14 schmitt trigger etc.
21 - Hal Feng <hal.feng@starfivetech.com>
25 const: starfive,jh7110-sys-pinctrl
39 interrupt-controller: true
41 '#interrupt-cells':
[all …]
H A Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
33 bias-pull-up:
[all …]
H A Dstarfive,jh7110-aon-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-aon-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd.
14 schmitt trigger etc.
18 - Hal Feng <hal.feng@starfivetech.com>
22 const: starfive,jh7110-aon-pinctrl
33 interrupt-controller: true
35 '#interrupt-cells':
[all …]
H A Dthead,th1520-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/thead,th1520-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: T-Head TH1520 SoC pin controller
10 - Emil Renner Berthing <emil.renner.berthing@canonical.com>
13 Pinmux and pinconf controller in the T-Head TH1520 RISC-V SoC.
17 PADCTRL_AOSYS -> PAD Group 1
18 PADCTRL1_APSYS -> PAD Group 2
19 PADCTRL0_APSYS -> PAD Group 3
[all …]
H A Dpinctrl-single.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-single.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
21 - enum:
22 - pinctrl-single
23 - pinconf-single
24 - items:
25 - enum:
[all …]
H A Dsprd,sc9860-pinctrl.txt7 - compatible: Must be "sprd,sc9860-pinctrl".
8 - reg: The register address of pin controller device.
9 - pins : An array of strings, each string containing the name of a pin.
12 - function: A string containing the name of the function, values must be
14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10,
16 - input-schmitt-disable: Enable schmitt-trigger mode.
17 - input-schmitt-enable: Disable schmitt-trigger mode.
18 - bias-disable: Disable pin bias.
19 - bias-pull-down: Pull down on pin.
20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor
[all …]
H A Dsprd,pinctrl.txt16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
46 and set the pin sleep related configuration as "input-enable", which
48 input enable automatically.
54 "sprd,sleep-mode" property to set pin sleep mode.
[all …]
H A Dsophgo,cv1800-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/sophgo,cv1800-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inochi Amaoto <inochiama@outlook.com>
15 - sophgo,cv1800b-pinctrl
16 - sophgo,cv1812h-pinctrl
17 - sophgo,sg2000-pinctrl
18 - sophgo,sg2002-pinctrl
22 - description: pinctrl for system domain
[all …]
H A Dnvidia,tegra-pinmux-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra-pinmux-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
14 Please refer to pinctrl-bindings.txt in this directory for details of the
22 pin configuration parameters, such as pull-up, tristate, drive strength,
46 $ref: /schemas/types.yaml#/definitions/string-array
57 description: Pull-down/up setting to apply to the pin.
[all …]
/linux/arch/riscv/boot/dts/thead/
H A Dth1520-beaglev-ahead.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
15 compatible = "beagle,beaglev-ahead", "thead,th1520";
35 stdout-path = "serial0:115200n8";
44 pinctrl-names = "default";
45 pinctrl-0 = <&led_pins>;
46 compatible = "gpio-leds";
48 led-1 {
[all …]
H A Dth1520-lichee-module-4a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
12 compatible = "sipeed,lichee-module-4a", "thead,th1520";
26 clock-frequency = <24000000>;
30 clock-frequency = <32768>;
34 gpio-line-names = "", "", "",
44 bus-width = <8>;
45 max-frequency = <198000000>;
46 mmc-hs400-1_8v;
47 non-removable;
[all …]
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2042-milkv-pioneer.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
12 model = "Milk-V Pioneer";
16 stdout-path = "serial0";
19 gpio-power {
20 compatible = "gpio-keys";
22 key-power {
26 linux,input-type = <EV_KEY>;
27 debounce-interval = <100>;
[all …]
H A Dsg2042-evb-v2.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "sophgo,sg2042-evb-v2", "sophgo,sg2042";
16 stdout-path = "serial0";
19 pwmfan: pwm-fan {
20 compatible = "pwm-fan";
21 cooling-levels = <103 128 179 230 255>;
23 #cooling-cells = <2>;
26 thermal-zones {
[all …]
H A Dsg2042-evb-v1.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "sophgo,sg2042-evb-v1", "sophgo,sg2042";
16 stdout-path = "serial0";
19 gpio-power {
20 compatible = "gpio-keys";
22 key-power {
26 linux,input-type = <EV_KEY>;
27 debounce-interval = <100>;
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drockchip-pinconf.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /omit-if-no-ref/
8 pcfg_pull_up: pcfg-pull-up {
9 bias-pull-up;
12 /omit-if-no-ref/
13 pcfg_pull_down: pcfg-pull-down {
14 bias-pull-down;
17 /omit-if-no-ref/
18 pcfg_pull_none: pcfg-pull-none {
19 bias-disable;
[all …]
/linux/drivers/pinctrl/
H A Dpinconf-generic.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
22 #include <linux/pinctrl/pinconf-generic.h>
28 #include "pinctrl-utils.h"
32 PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL, false),
33 PCONFDUMP(PIN_CONFIG_BIAS_DISABLE, "input bias disabled", NULL, false),
34 PCONFDUMP(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, "input bias high impedance", NULL, false),
35 PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", "ohms", true),
37 "input bias pull to pin specific state", "ohms", true),
[all …]

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