xref: /linux/arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1*724ba675SRob Herring/*
2*724ba675SRob Herring * CIAA NXP LPC4337 (http://www.proyecto-ciaa.com.ar)
3*724ba675SRob Herring *
4*724ba675SRob Herring * Copyright (C) 2015 VanguardiaSur - www.vanguardiasur.com.ar
5*724ba675SRob Herring *
6*724ba675SRob Herring * This code is released using a dual license strategy: BSD/GPL
7*724ba675SRob Herring * You can choose the licence that better fits your requirements.
8*724ba675SRob Herring *
9*724ba675SRob Herring * Released under the terms of 3-clause BSD License
10*724ba675SRob Herring * Released under the terms of GNU General Public License Version 2.0
11*724ba675SRob Herring */
12*724ba675SRob Herring/dts-v1/;
13*724ba675SRob Herring
14*724ba675SRob Herring#include "lpc18xx.dtsi"
15*724ba675SRob Herring#include "lpc4357.dtsi"
16*724ba675SRob Herring
17*724ba675SRob Herring#include "dt-bindings/gpio/gpio.h"
18*724ba675SRob Herring
19*724ba675SRob Herring/ {
20*724ba675SRob Herring	model = "CIAA NXP LPC4337";
21*724ba675SRob Herring	compatible = "ciaa,lpc4337", "nxp,lpc4337", "nxp,lpc4350";
22*724ba675SRob Herring
23*724ba675SRob Herring	aliases {
24*724ba675SRob Herring		serial0 = &uart2;
25*724ba675SRob Herring		serial1 = &uart3;
26*724ba675SRob Herring	};
27*724ba675SRob Herring
28*724ba675SRob Herring	chosen {
29*724ba675SRob Herring		bootargs = "console=ttyS0,115200 earlyprintk";
30*724ba675SRob Herring		stdout-path = &uart2;
31*724ba675SRob Herring	};
32*724ba675SRob Herring
33*724ba675SRob Herring	memory@28000000 {
34*724ba675SRob Herring		device_type = "memory";
35*724ba675SRob Herring		reg = <0x28000000 0x0800000>; /* 8 MB */
36*724ba675SRob Herring	};
37*724ba675SRob Herring};
38*724ba675SRob Herring
39*724ba675SRob Herring&pinctrl {
40*724ba675SRob Herring	enet_rmii_pins: enet-rmii-pins {
41*724ba675SRob Herring		enet_rmii_rxd_cfg {
42*724ba675SRob Herring			pins = "p1_15", "p0_0";
43*724ba675SRob Herring			function = "enet";
44*724ba675SRob Herring			slew-rate = <1>;
45*724ba675SRob Herring			bias-disable;
46*724ba675SRob Herring			input-enable;
47*724ba675SRob Herring			input-schmitt-disable;
48*724ba675SRob Herring		};
49*724ba675SRob Herring
50*724ba675SRob Herring		enet_rmii_txd_cfg {
51*724ba675SRob Herring			pins = "p1_18", "p1_20";
52*724ba675SRob Herring			function = "enet";
53*724ba675SRob Herring			slew-rate = <1>;
54*724ba675SRob Herring			bias-disable;
55*724ba675SRob Herring			input-enable;
56*724ba675SRob Herring			input-schmitt-disable;
57*724ba675SRob Herring		};
58*724ba675SRob Herring
59*724ba675SRob Herring		enet_rmii_rx_dv_cfg {
60*724ba675SRob Herring			pins = "p1_16";
61*724ba675SRob Herring			function = "enet";
62*724ba675SRob Herring			bias-disable;
63*724ba675SRob Herring			input-enable;
64*724ba675SRob Herring			input-schmitt-disable;
65*724ba675SRob Herring		};
66*724ba675SRob Herring
67*724ba675SRob Herring		enet_rmii_tx_en_cfg {
68*724ba675SRob Herring			pins = "p0_1";
69*724ba675SRob Herring			function = "enet";
70*724ba675SRob Herring			bias-disable;
71*724ba675SRob Herring			input-enable;
72*724ba675SRob Herring			input-schmitt-disable;
73*724ba675SRob Herring		};
74*724ba675SRob Herring
75*724ba675SRob Herring		enet_ref_clk_cfg {
76*724ba675SRob Herring			pins = "p1_19";
77*724ba675SRob Herring			function = "enet";
78*724ba675SRob Herring			slew-rate = <1>;
79*724ba675SRob Herring			bias-disable;
80*724ba675SRob Herring			input-enable;
81*724ba675SRob Herring			input-schmitt-disable;
82*724ba675SRob Herring		};
83*724ba675SRob Herring
84*724ba675SRob Herring		enet_mdio_cfg {
85*724ba675SRob Herring			pins = "p1_17";
86*724ba675SRob Herring			function = "enet";
87*724ba675SRob Herring			bias-disable;
88*724ba675SRob Herring			input-enable;
89*724ba675SRob Herring			input-schmitt-disable;
90*724ba675SRob Herring		};
91*724ba675SRob Herring
92*724ba675SRob Herring		enet_mdc_cfg {
93*724ba675SRob Herring			pins = "p7_7";
94*724ba675SRob Herring			function = "enet";
95*724ba675SRob Herring			slew-rate = <1>;
96*724ba675SRob Herring			bias-disable;
97*724ba675SRob Herring			input-enable;
98*724ba675SRob Herring			input-schmitt-disable;
99*724ba675SRob Herring		};
100*724ba675SRob Herring	};
101*724ba675SRob Herring
102*724ba675SRob Herring	i2c0_pins: i2c0-pins {
103*724ba675SRob Herring		i2c0_pins_cfg {
104*724ba675SRob Herring			pins = "i2c0_scl", "i2c0_sda";
105*724ba675SRob Herring			function = "i2c0";
106*724ba675SRob Herring			input-enable;
107*724ba675SRob Herring		};
108*724ba675SRob Herring	};
109*724ba675SRob Herring
110*724ba675SRob Herring	ssp_pins: ssp-pins {
111*724ba675SRob Herring		ssp1_cs {
112*724ba675SRob Herring			pins = "p6_7";
113*724ba675SRob Herring			function = "gpio";
114*724ba675SRob Herring			bias-pull-up;
115*724ba675SRob Herring			bias-disable;
116*724ba675SRob Herring		};
117*724ba675SRob Herring
118*724ba675SRob Herring		ssp1_miso_mosi {
119*724ba675SRob Herring			pins = "p1_3", "p1_4";
120*724ba675SRob Herring			function = "ssp1";
121*724ba675SRob Herring			slew-rate = <1>;
122*724ba675SRob Herring			bias-pull-down;
123*724ba675SRob Herring			input-enable;
124*724ba675SRob Herring			input-schmitt-disable;
125*724ba675SRob Herring		};
126*724ba675SRob Herring
127*724ba675SRob Herring		ssp1_sck {
128*724ba675SRob Herring			pins = "pf_4";
129*724ba675SRob Herring			function = "ssp1";
130*724ba675SRob Herring			slew-rate = <1>;
131*724ba675SRob Herring			bias-disable;
132*724ba675SRob Herring		};
133*724ba675SRob Herring	};
134*724ba675SRob Herring
135*724ba675SRob Herring	uart2_pins: uart2-pins {
136*724ba675SRob Herring		uart2_rx_cfg {
137*724ba675SRob Herring			pins = "p7_2";
138*724ba675SRob Herring			function = "uart2";
139*724ba675SRob Herring			bias-disable;
140*724ba675SRob Herring			input-enable;
141*724ba675SRob Herring		};
142*724ba675SRob Herring
143*724ba675SRob Herring		uart2_tx_cfg {
144*724ba675SRob Herring			pins = "p7_1";
145*724ba675SRob Herring			function = "uart2";
146*724ba675SRob Herring			bias-disable;
147*724ba675SRob Herring		};
148*724ba675SRob Herring	};
149*724ba675SRob Herring
150*724ba675SRob Herring	uart3_pins: uart3-pins {
151*724ba675SRob Herring		uart3_rx_cfg {
152*724ba675SRob Herring			pins = "p2_4";
153*724ba675SRob Herring			function = "uart3";
154*724ba675SRob Herring			bias-disable;
155*724ba675SRob Herring			input-enable;
156*724ba675SRob Herring		};
157*724ba675SRob Herring
158*724ba675SRob Herring		uart3_tx_cfg {
159*724ba675SRob Herring			pins = "p2_3";
160*724ba675SRob Herring			function = "uart3";
161*724ba675SRob Herring			bias-disable;
162*724ba675SRob Herring		};
163*724ba675SRob Herring	};
164*724ba675SRob Herring};
165*724ba675SRob Herring
166*724ba675SRob Herring&enet_tx_clk {
167*724ba675SRob Herring	clock-frequency = <50000000>;
168*724ba675SRob Herring};
169*724ba675SRob Herring
170*724ba675SRob Herring&i2c0 {
171*724ba675SRob Herring	status = "okay";
172*724ba675SRob Herring	pinctrl-names = "default";
173*724ba675SRob Herring	pinctrl-0 = <&i2c0_pins>;
174*724ba675SRob Herring	clock-frequency = <400000>;
175*724ba675SRob Herring
176*724ba675SRob Herring	eeprom@50 {
177*724ba675SRob Herring		compatible = "microchip,24c512", "atmel,24c512";
178*724ba675SRob Herring		reg = <0x50>;
179*724ba675SRob Herring	};
180*724ba675SRob Herring
181*724ba675SRob Herring	eeprom@51 {
182*724ba675SRob Herring		compatible = "microchip,24c02", "atmel,24c02";
183*724ba675SRob Herring		reg = <0x51>;
184*724ba675SRob Herring	};
185*724ba675SRob Herring
186*724ba675SRob Herring	eeprom@54 {
187*724ba675SRob Herring		compatible = "microchip,24c512", "atmel,24c512";
188*724ba675SRob Herring		reg = <0x54>;
189*724ba675SRob Herring	};
190*724ba675SRob Herring};
191*724ba675SRob Herring
192*724ba675SRob Herring&mac {
193*724ba675SRob Herring	status = "okay";
194*724ba675SRob Herring	phy-mode = "rmii";
195*724ba675SRob Herring	pinctrl-names = "default";
196*724ba675SRob Herring	pinctrl-0 = <&enet_rmii_pins>;
197*724ba675SRob Herring};
198*724ba675SRob Herring
199*724ba675SRob Herring&sct_pwm {
200*724ba675SRob Herring	status = "okay";
201*724ba675SRob Herring};
202*724ba675SRob Herring
203*724ba675SRob Herring&ssp1 {
204*724ba675SRob Herring	status = "okay";
205*724ba675SRob Herring	pinctrl-names = "default";
206*724ba675SRob Herring	pinctrl-0 = <&ssp_pins>;
207*724ba675SRob Herring	cs-gpios = <&gpio LPC_GPIO(5,15) GPIO_ACTIVE_HIGH>;
208*724ba675SRob Herring	num-cs = <1>;
209*724ba675SRob Herring};
210*724ba675SRob Herring
211*724ba675SRob Herring&uart2 {
212*724ba675SRob Herring	status = "okay";
213*724ba675SRob Herring	pinctrl-names = "default";
214*724ba675SRob Herring	pinctrl-0 = <&uart2_pins>;
215*724ba675SRob Herring};
216*724ba675SRob Herring
217*724ba675SRob Herring&uart3 {
218*724ba675SRob Herring	status = "okay";
219*724ba675SRob Herring	pinctrl-names = "default";
220*724ba675SRob Herring	pinctrl-0 = <&uart3_pins>;
221*724ba675SRob Herring};
222