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/linux/Documentation/devicetree/bindings/clock/ti/
H A Dti,apll-clock.yaml44 "idlest" - contains the idlest register offset
51 ti,idlest-shift:
53 description: bit-shift for the idlest field (OMAP2 only)
85 ti,idlest-shift = <8>;
H A Ddpll.txt40 "idlest" - contains the idle status register base address
49 ti,omap2-* dpll type does not support idlest / autoidle registers
/linux/drivers/clk/ti/
H A Dclkt_dflt.c39 * @reg: virtual address of module IDLEST register
41 * @idlest: idle state indicator (0 or 1) for the clock
48 * individual IP block that the IDLEST register exists in.
52 u32 mask, u8 idlest, const char *name) in _wait_idlest_generic() argument
56 ena = (idlest) ? 0 : mask; in _wait_idlest_generic()
92 /* Not all modules have multiple clocks that their IDLEST depends on */ in _omap2_module_wait_ready()
104 /* IDLEST register not in the CM module */ in _omap2_module_wait_ready()
151 * @clk: struct clk * to find IDLEST info for
159 * the IDLEST register address ID corresponds to the CM_*CLKEN
H A Dclkt_iclk.c93 /* 2430 I2CHS has non-standard IDLEST register */
H A Dclk-3xxx.c73 * target IDLEST bits. For our purposes, we are concerned with the
74 * target IDLEST bits, which exist at a different bit position than
H A Dapll.c383 if (of_property_read_u32(node, "ti,idlest-shift", &val)) { in of_omap2_apll_setup()
384 pr_err("%pOFn missing idlest-shift\n", node); in of_omap2_apll_setup()
/linux/arch/arm/mach-omap2/
H A Dcm33xx.c28 * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
82 * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
86 * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to
102 * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
219 * Wait for the module IDLEST to be functional. If the idle state is in any
243 * Wait for the module IDLEST to be disabled. Some PRCM transition,
H A Dcminst44xx.c40 * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
77 * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
82 * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to
99 * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
269 * Wait for the module IDLEST to be functional. If the idle state is in any
293 * Wait for the module IDLEST to be disabled. Some PRCM transition,
H A Dcm_common.c47 * the PRCM instance offset and IDLEST register ID back to the caller
79 * or if the idlest register is unknown on the SoC.
105 * registered or if the idlest register is unknown on the SoC.
H A Dclock.c120 /* Idlest value for interface clocks. in ti_clk_init_features()
H A Domap_hwmod.h328 * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
333 * would be needed for IDLEST information, but alas, there are some
335 * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
/linux/include/linux/clk/
H A Dti.h137 * @find_idlest: find idlest register information for a clock
239 * @cm_split_idlest_reg: pointer to CM module function to split idlest reg
/linux/arch/arm/boot/dts/ti/omap/
H A Domap24xx-clocks.dtsi133 ti,idlest-shift = <8>;
143 ti,idlest-shift = <9>;