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Searched full:host_ctl (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/memstick/host/
H A Djmb38x_ms.c677 unsigned int host_ctl = readl(host->addr + HOST_CONTROL); in jmb38x_ms_set_param() local
688 host_ctl = 7; in jmb38x_ms_set_param()
689 host_ctl |= HOST_CONTROL_POWER_EN in jmb38x_ms_set_param()
691 writel(host_ctl, host->addr + HOST_CONTROL); in jmb38x_ms_set_param()
703 host_ctl &= ~(HOST_CONTROL_POWER_EN in jmb38x_ms_set_param()
705 writel(host_ctl, host->addr + HOST_CONTROL); in jmb38x_ms_set_param()
715 host_ctl &= ~(HOST_CONTROL_FAST_CLK | HOST_CONTROL_REI | in jmb38x_ms_set_param()
717 host_ctl |= HOST_CONTROL_TDELAY_EN | HOST_CONTROL_HW_OC_P; in jmb38x_ms_set_param()
718 host_ctl &= ~(3 << HOST_CONTROL_IF_SHIFT); in jmb38x_ms_set_param()
721 host_ctl |= HOST_CONTROL_IF_SERIAL in jmb38x_ms_set_param()
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/linux/drivers/ata/
H A Dahci_brcm.c270 ctl = readl(mmio + HOST_CTL); in brcm_ahci_read_id()
272 writel(ctl, mmio + HOST_CTL); in brcm_ahci_read_id()
273 readl(mmio + HOST_CTL); /* flush */ in brcm_ahci_read_id()
307 ctl = readl(mmio + HOST_CTL); in brcm_ahci_read_id()
309 writel(ctl, mmio + HOST_CTL); in brcm_ahci_read_id()
310 readl(mmio + HOST_CTL); /* flush */ in brcm_ahci_read_id()
H A Dsata_inic162x.c76 HOST_CTL = 0x7c, enumerator
110 /* HOST_CTL bits */
549 writew(HCTL_FTHD0 | HCTL_LEDEN, port_base + HOST_CTL); in inic_qc_issue()
762 writew(hctl | HCTL_SOFTRST, mmio_base + HOST_CTL); in init_controller()
763 readw(mmio_base + HOST_CTL); /* flush */ in init_controller()
767 val = readw(mmio_base + HOST_CTL); in init_controller()
784 writew(hctl & ~HCTL_IRQOFF, mmio_base + HOST_CTL); in init_controller()
853 hpriv->cached_hctl = readw(hpriv->mmio_base + HOST_CTL); in inic_init_one()
H A Dlibahci.c217 tmp = readl(mmio + HOST_CTL); in ahci_enable_ahci()
226 writel(tmp, mmio + HOST_CTL); in ahci_enable_ahci()
227 tmp = readl(mmio + HOST_CTL); /* flush && sanity check */ in ahci_enable_ahci()
992 tmp = readl(mmio + HOST_CTL); in ahci_reset_controller()
994 writel(tmp | HOST_RESET, mmio + HOST_CTL); in ahci_reset_controller()
995 readl(mmio + HOST_CTL); /* flush */ in ahci_reset_controller()
1003 tmp = ata_wait_register(NULL, mmio + HOST_CTL, HOST_RESET, in ahci_reset_controller()
1314 tmp = readl(mmio + HOST_CTL); in ahci_init_controller()
1315 dev_dbg(host->dev, "HOST_CTL 0x%x\n", tmp); in ahci_init_controller()
1316 writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL); in ahci_init_controller()
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H A Dsata_highbank.c586 ctl = readl(mmio + HOST_CTL); in ahci_highbank_suspend()
588 writel(ctl, mmio + HOST_CTL); in ahci_highbank_suspend()
589 readl(mmio + HOST_CTL); /* flush */ in ahci_highbank_suspend()
H A Dahci_ceva.c130 tmp = readl(mmio + HOST_CTL); in ahci_ceva_setup()
132 writel(tmp, mmio + HOST_CTL); in ahci_ceva_setup()
H A Dahci.c1011 ctl = readl(mmio + HOST_CTL); in ahci_pci_disable_interrupts()
1013 writel(ctl, mmio + HOST_CTL); in ahci_pci_disable_interrupts()
1014 readl(mmio + HOST_CTL); /* flush */ in ahci_pci_disable_interrupts()
1755 if (!(readl(hpriv->mmio + HOST_CTL) & HOST_MRSM)) { in ahci_init_irq()
H A Dsata_nv.c1862 dev_dbg(&pdev->dev, "HOST_CTL:0x%X\n", tmp); in nv_swncq_host_init()