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/linux/drivers/gpu/drm/meson/
H A Dmeson_encoder_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <media/cec-notifier.h>
29 #include <linux/media-bus-format.h>
40 struct drm_bridge bridge; member
49 container_of(x, struct meson_encoder_hdmi, bridge)
51 static int meson_encoder_hdmi_attach(struct drm_bridge *bridge, in meson_encoder_hdmi_attach() argument
55 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); in meson_encoder_hdmi_attach()
57 return drm_bridge_attach(encoder, encoder_hdmi->next_bridge, in meson_encoder_hdmi_attach()
58 &encoder_hdmi->bridge, flags); in meson_encoder_hdmi_attach()
61 static void meson_encoder_hdmi_detach(struct drm_bridge *bridge) in meson_encoder_hdmi_detach() argument
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H A Dmeson_dw_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <drm/bridge/dw_hdmi.h>
32 #define DRIVER_NAME "meson-dw-hdmi"
33 #define DRIVER_DESC "Amlogic Meson HDMI-TX DRM driver"
36 * DOC: HDMI Output
38 * HDMI Output is composed of :
40 * - A Synopsys DesignWare HDMI Controller IP
41 * - A TOP control block controlling the Clocks and PHY
42 * - A custom HDMI PHY in order convert video to TMDS signal
47 * | HDMI TOP |<= HPD
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/linux/drivers/gpu/drm/imx/ipuv3/
H A Ddw_hdmi-imx.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
4 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
9 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
14 #include <video/imx-ipu-v3.h>
16 #include <drm/bridge/dw_hdmi.h>
25 #include "imx-drm.h"
31 struct imx_hdmi *hdmi; member
36 struct drm_bridge *bridge; member
37 struct dw_hdmi *hdmi; member
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/linux/Documentation/devicetree/bindings/display/bridge/
H A Dlontium,lt8912b.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lontium,lt8912b.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lontium LT8912B MIPI to HDMI Bridge
10 - Adrien Grassein <adrien.grassein@gmail.com>
13 The LT8912B is a bridge device which convert DSI to HDMI
18 - lontium,lt8912b
23 reset-gpios:
32 $ref: /schemas/graph.yaml#/$defs/port-base
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H A Dlontium,lt9611.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lontium,lt9611.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lontium LT9611(UXC) 2 Port MIPI to HDMI Bridge
10 - Vinod Koul <vkoul@kernel.org>
13 The LT9611 and LT9611UXC are bridge devices which convert DSI to HDMI
18 - lontium,lt9611
19 - lontium,lt9611uxc
24 "#sound-dai-cells":
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H A Dite,it66121.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/ite,it66121.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ITE it66121 HDMI bridge
10 - Phong LE <ple@baylibre.com>
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 The IT66121 is a high-performance and low-power single channel HDMI
15 transmitter, fully compliant with HDMI 1.3a, HDCP 1.2 and backward compatible
21 - ite,it66121
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H A Dgoogle,cros-ec-anx7688.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/google,cros-ec-anx7688.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ChromeOS EC ANX7688 HDMI to DP Converter through Type-C Port
10 - Nicolas Boichat <drinkcat@chromium.org>
13 ChromeOS EC ANX7688 is a display bridge that converts HDMI 2.0 to
14 DisplayPort 1.3 Ultra-HDi (4096x2160p60). It is an Analogix ANX7688 chip
16 (See google,cros-ec.yaml). It is accessed using I2C tunneling through
18 (See google,cros-ec-i2c-tunnel.yaml).
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H A Dsil,sii8620.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/sil,sii8620.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Silicon Image SiI8620 HDMI/MHL bridge
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
22 clock-names:
24 - const: xtal
26 cvcc10-supply:
32 iovcc18-supply:
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H A Dsil,sii9234.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/sil,sii9234.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Silicon Image SiI9234 HDMI/MHL bridge
10 - Maciej Purski <m.purski@samsung.com>
20 avcc12-supply:
23 avcc33-supply:
26 cvcc12-supply:
29 iovcc18-supply:
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H A Dingenic,jz4780-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/ingenic,jz4780-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic JZ4780 HDMI Transmitter
10 - H. Nikolaus Schaller <hns@goldelico.com>
13 The HDMI Transmitter in the Ingenic JZ4780 is a Synopsys DesignWare HDMI 1.4
17 - $ref: synopsys,dw-hdmi.yaml#
21 const: ingenic,jz4780-dw-hdmi
23 reg-io-width:
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H A Dsynopsys,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for Synopsys DesignWare HDMI TX Controller
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 This document defines device tree properties for the Synopsys DesignWare HDMI
14 TX controller (DWC HDMI TX) IP core. It doesn't constitute a full device tree
16 bindings for the platform-specific integrations of the DWC HDMI TX.
26 reg-io-width:
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H A Drenesas,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car DWC HDMI TX Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: synopsys,dw-hdmi.yaml#
22 - enum:
23 - renesas,r8a774a1-hdmi # for RZ/G2M compatible HDMI TX
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/linux/Documentation/gpu/bridge/
H A Ddw-hdmi.rst2 drm/bridge/dw-hdmi Synopsys DesignWare HDMI Controller
5 Synopsys DesignWare HDMI Controller
8 This section covers everything related to the Synopsys DesignWare HDMI
9 Controller implemented as a DRM bridge.
12 -------------------------------------
14 .. kernel-doc:: include/drm/bridge/dw_hdmi.h
/linux/drivers/gpu/drm/display/
H A Ddrm_bridge_connector.c1 // SPDX-License-Identifier: GPL-2.0+
31 * The DRM bridge connector helper object provides a DRM connector
37 * To use the helper, display controller drivers create a bridge connector with
43 * The DRM bridge connector operations are implemented based on the operations
45 * to the bridge closest to the connector (at the end of the chain) that
48 * To make use of this helper, all bridges in the chain shall report bridge
49 * operation flags (&drm_bridge->ops) and bridge output type
50 * (&drm_bridge->type), as well as the DRM_BRIDGE_ATTACH_NO_CONNECTOR attach
55 * struct drm_bridge_connector - A connector backed by a chain of bridges
71 * The last bridge in the chain (closest to the connector) that provides
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/linux/drivers/gpu/drm/bridge/
H A Dtda998x_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/hdmi.h>
15 #include <sound/hdmi-codec.h>
25 #include <media/cec-notifier.h>
27 #include <dt-bindings/display/tda998x.h>
55 struct i2c_client *hdmi; member
83 struct drm_bridge bridge; member
97 container_of(x, struct tda998x_priv, bridge)
411 .addr = priv->cec_addr, in cec_write()
417 ret = i2c_transfer(priv->hdmi->adapter, &msg, 1); in cec_write()
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/linux/drivers/gpu/drm/mcde/
H A Dmcde_drv.c1 // SPDX-License-Identifier: GPL-2.0
5 * (C) ST-Ericsson SA 2013
9 * DOC: ST-Ericsson MCDE Driver
11 * The MCDE (short for multi-channel display engine) is a graphics
15 * ST-Ericsson U8500 where is was used for mass-market deployments
18 * It can do 1080p30 on SDTV CCIR656, DPI-2, DBI-2 or DSI for
25 * Memory -> Overlay -> Channel -> FIFO -> 8 formatters -> DSI/DPI
26 * External 0..5 0..3 A,B, 6 x DSI bridge
29 * FIFOs A and B are for LCD and HDMI while FIFO CO/C1 are for
41 * helpers. We then provide a bridge to the DSI port, and on the DSI port
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/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl,imx6-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX6 DWC HDMI TX Encoder
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - fsl,imx6dl-hdmi
23 - fsl,imx6q-hdmi
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H A Dfsl,imx8mp-hdmi-pvi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8MP HDMI Parallel Video Interface
10 - Lucas Stach <l.stach@pengutronix.de>
13 The HDMI parallel video interface is a timing and sync generator block in the
14 i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
18 const: fsl,imx8mp-hdmi-pvi
26 power-domains:
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/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * HDMI driver definition for TI OMAP4 Processor.
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
14 #include <linux/hdmi.h>
15 #include <sound/omap-hdmi-audio.h>
24 /* HDMI Wrapper */
45 /* HDMI WP IRQ flags */
60 /* HDMI PLL */
72 /* HDMI PHY */
295 /* HDMI wrapper funcs */
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/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek HDMI Encoder
10 - CK Hu <ck.hu@mediatek.com>
11 - Jitao shi <jitao.shi@mediatek.com>
14 The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from
20 - mediatek,mt2701-hdmi
21 - mediatek,mt7623-hdmi
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/linux/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_dw_hdmi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Gen3 HDMI PHY
14 #include <drm/bridge/dw_hdmi.h>
41 rcar_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, in rcar_hdmi_mode_valid() argument
49 if (mode->clock > 297000) in rcar_hdmi_mode_valid()
55 static int rcar_hdmi_phy_configure(struct dw_hdmi *hdmi, void *data, in rcar_hdmi_phy_configure() argument
60 for (; params->mpixelclock != ~0UL; ++params) { in rcar_hdmi_phy_configure()
61 if (mpixelclock <= params->mpixelclock) in rcar_hdmi_phy_configure()
65 if (params->mpixelclock == ~0UL) in rcar_hdmi_phy_configure()
66 return -EINVAL; in rcar_hdmi_phy_configure()
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/linux/drivers/gpu/drm/bridge/imx/
H A Dimx8mp-hdmi-tx.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <drm/bridge/dw_hdmi.h>
25 struct imx8mp_hdmi *hdmi = (struct imx8mp_hdmi *)data; in imx8mp_hdmi_mode_valid() local
28 if (mode->clock < 13500) in imx8mp_hdmi_mode_valid()
31 if (mode->clock > 297000) in imx8mp_hdmi_mode_valid()
34 round_rate = clk_round_rate(hdmi->pixclk, mode->clock * 1000); in imx8mp_hdmi_mode_valid()
35 /* imx8mp's pixel clock generator (fsl-samsung-hdmi) cannot generate in imx8mp_hdmi_mode_valid()
39 * 0.5% = 5/1000 tolerance (mode->clock is 1/1000) in imx8mp_hdmi_mode_valid()
41 if (abs(round_rate - mode->clock * 1000) > mode->clock * 5) in imx8mp_hdmi_mode_valid()
44 /* We don't support double-clocked and Interlaced modes */ in imx8mp_hdmi_mode_valid()
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx53-qsb-hdmi.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/gpio/gpio.h>
9 /dts-v1/;
13 hdmi: connector-hdmi {
14 compatible = "hdmi-connector";
15 label = "hdmi";
20 remote-endpoint = <&sii9022_out>;
25 reg_1p2v: regulator-1p2v {
26 compatible = "regulator-fixed";
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/linux/drivers/gpu/drm/ingenic/
H A Dingenic-dw-hdmi.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
5 * Derived from dw_hdmi-imx.c with i.MX portions removed.
12 #include <drm/bridge/dw_hdmi.h>
47 ingenic_dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, in ingenic_dw_hdmi_mode_valid() argument
51 if (mode->clock < 13500) in ingenic_dw_hdmi_mode_valid()
54 if (mode->clock > 216000) in ingenic_dw_hdmi_mode_valid()
69 { .compatible = "ingenic,jz4780-dw-hdmi" },
76 struct dw_hdmi *hdmi = (struct dw_hdmi *)data; in ingenic_dw_hdmi_cleanup() local
78 dw_hdmi_remove(hdmi); in ingenic_dw_hdmi_cleanup()
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/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip DWC HDMI TX Encoder
10 - Mark Yao <markyao0591@gmail.com>
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
18 - $ref: /schemas/sound/dai-common.yaml#
23 - rockchip,rk3228-dw-hdmi
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