Home
last modified time | relevance | path

Searched +full:half +full:- +full:bit (Results 1 – 25 of 886) sorted by relevance

12345678910>>...36

/linux/arch/parisc/kernel/
H A Dsignal32.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Signal support for 32-bit kernel builds
4 * Copyright (C) 2001 Matthew Wilcox <willy at parisc-linux.org>
5 * Copyright (C) 2006 Kyle McMartin <kyle at parisc-linux.org>
44 /* When loading 32-bit values into 64-bit registers make in restore_sigcontext32()
45 sure to clear the upper 32-bits */ in restore_sigcontext32()
50 err |= __get_user(compat_reg,&sc->sc_gr[regn]); in restore_sigcontext32()
51 regs->gr[regn] = compat_reg; in restore_sigcontext32()
52 /* Load upper half */ in restore_sigcontext32()
53 err |= __get_user(compat_regt,&rf->rf_gr[regn]); in restore_sigcontext32()
[all …]
H A Dsignal32.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2001 Matthew Wilcox <willy at parisc-linux.org>
4 * Copyright (C) 2003 Carlos O'Donell <carlos at parisc-linux.org>
11 /* 32-bit ucontext as seen from an 64-bit kernel */
16 /* FIXME: Pad out to get uc_mcontext to start at an 8-byte aligned boundary */
24 /* In a deft move of uber-hackery, we decide to carry the top half of all
25 * 64-bit registers in a non-portable, non-ABI, hidden structure.
31 /* Upper half of all the 64-bit registers that were truncated
32 on a copy to a 32-bit userspace */
48 * The 32-bit ABI wants at least 48 bytes for a function call frame:
[all …]
/linux/drivers/media/usb/stk1160/
H A Dstk1160-reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * <elezegarcia--a.t--gmail.com>
10 * <rmthomas--a.t--sciolus.org>
19 /* Power-on Strapping Data */
24 #define STK1160_POSV_L_ACDOUT BIT(3)
25 #define STK1160_POSV_L_ACSYNC BIT(2)
30 * with bit #7 (0x?? OR 0x80 to activate).
39 * Bit 0 - Horizontal Decimation Control
42 * Bit 1 - Decimates Half or More Column
43 * 0 Decimates less than half from original column,
[all …]
/linux/include/uapi/linux/dvb/
H A Dosd.h1 /* SPDX-License-Identifier: LGPL-2.1+ WITH Linux-syscall-note */
3 * osd.h - DEPRECATED On Screen Display API
18 /* All functions return -2 on "not open" */
26 * Opens OSD with this size and bit depth
27 * returns 0 on success, -1 on DRAM allocation error, -2 on "already open"
57 * returns 0 on success, -1 on error
64 * R,G,B, and a opacity value: 0->transparent, 1..254->mix, 255->pixel
74 * returns 0 on success, -1 on error
77 /* returns color number of pixel <x>,<y>, or -1 */
81 * returns 0 on success, -1 on clipping all pixel (no pixel drawn)
[all …]
/linux/drivers/soc/fsl/qe/
H A Dtsa.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <dt-bindings/soc/cpm1-fsl,tsa.h>
12 #include <dt-bindings/soc/qe-fsl,tsa.h>
24 #define TSA_CPM1_SIRAM_ENTRY_LAST BIT(16)
25 #define TSA_CPM1_SIRAM_ENTRY_BYTE BIT(17)
37 #define TSA_QE_SIRAM_ENTRY_LAST BIT(0)
38 #define TSA_QE_SIRAM_ENTRY_BYTE BIT(1)
51 * - CPM1: 32bit register split in 2*16bit (16bit TDM)
52 * - QE: 4x16bit registers, one per TDM
59 #define TSA_CPM1_SIMODE_SMC2 BIT(31)
[all …]
/linux/sound/soc/fsl/
H A Dlpc3xxx-i2s.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
19 struct mutex lock; /* To serialize user-space access */
43 #define LPC3XXX_I2S_WW8 FIELD_PREP(0x3, 0) /* Word width is 8bit */
44 #define LPC3XXX_I2S_WW16 FIELD_PREP(0x3, 1) /* Word width is 16bit */
45 #define LPC3XXX_I2S_WW32 FIELD_PREP(0x3, 3) /* Word width is 32bit */
46 #define LPC3XXX_I2S_MONO BIT(2) /* Mono */
47 #define LPC3XXX_I2S_STOP BIT(3) /* Stop, diables the access to FIFO, mutes the channel */
48 #define LPC3XXX_I2S_RESET BIT(4) /* Reset the channel */
49 #define LPC3XXX_I2S_WS_SEL BIT(5) /* Channel Master(0) or slave(1) mode select */
50 #define LPC3XXX_I2S_WS_HP(s) FIELD_PREP(0x7FC0, s) /* Word select half period - 1 */
[all …]
/linux/arch/loongarch/include/asm/
H A Dchecksum.h1 /* SPDX-License-Identifier: GPL-2.0-only */
20 * turns a 32-bit partial checksum (e.g. from csum_partial) into a
21 * 1's complement 16-bit checksum.
28 * swap the two 16-bit halves of sum in csum_fold()
29 * if there is a carry from adding the two 16-bit halves, in csum_fold()
30 * it will carry from the lower half into the upper half, in csum_fold()
31 * giving us the correct sum in the upper half. in csum_fold()
40 * of 32-bit words and is always >= 5.
50 n -= 4; in ip_fast_csum()
56 } while (--n > 0); in ip_fast_csum()
[all …]
/linux/lib/crypto/riscv/
H A Dchacha-riscv64-zvkb.S1 /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
3 // This file is dual-licensed, meaning that you can use it under your
39 // The generated code of this file depends on the following RISC-V extensions:
40 // - RV64I
41 // - RISC-V Vector ('V') with VLEN >= 128
42 // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')
88 vror.vi \d0, \d0, 32 - 16
89 vror.vi \d1, \d1, 32 - 16
90 vror.vi \d2, \d2, 32 - 16
91 vror.vi \d3, \d3, 32 - 16
[all …]
/linux/drivers/clk/sunxi/
H A Dclk-sun4i-tcon-ch1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
8 #include <linux/clk-provider.h>
17 #define TCON_CH1_SCLK2_GATE_BIT BIT(31)
23 #define TCON_CH1_SCLK1_GATE_BIT BIT(15)
24 #define TCON_CH1_SCLK1_HALF_BIT BIT(11)
40 spin_lock_irqsave(&tclk->lock, flags); in tcon_ch1_disable()
41 reg = readl(tclk->reg); in tcon_ch1_disable()
43 writel(reg, tclk->reg); in tcon_ch1_disable()
44 spin_unlock_irqrestore(&tclk->lock, flags); in tcon_ch1_disable()
[all …]
/linux/drivers/net/ethernet/atheros/atlx/
H A Datlx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* atlx_hw.h -- common hardware definitions for Attansic network drivers
4 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
5 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
6 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
10 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
149 /* IRQ Anti-Lost Timer Initial Value Register */
228 /* MAC Half-Duplex Control Register */
246 /* Wake-On-Lan control register */
303 #define MII_CR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */
[all …]
/linux/Documentation/userspace-api/media/dvb/
H A Dlegacy_dvb_osd.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later OR GPL-2.0
14 The DVB OSD device controls the OnScreen-Display of the AV7110 based
15 DVB-cards with hardware MPEG2 decoder. It can be accessed through
20 The OSD is not a frame-buffer like on many other cards.
22 The color-depth is limited depending on the memory size installed.
31 -----------
36 .. code-block:: c
39 /* All functions return -2 on "not open" */
67 .. note:: All functions return -2 on "not open"
69 .. flat-table::
[all …]
/linux/Documentation/filesystems/
H A Dqnx6.rst1 .. SPDX-License-Identifier: GPL-2.0
29 ------
35 Blockpointers are 32bit, so the maximum space that can be addressed is
39 ---------------
42 Each qnx6fs got two superblocks, each one having a 64bit serial number.
65 Unused block pointers are always set to ~0 - regardless of root node,
79 0x1000 is the size reserved for each superblock - regardless of the
83 ------
100 The filesize is stored 64bit. Inode counting starts with 1. (while long
104 -----------
[all …]
/linux/include/soc/mscc/
H A Docelot_vcap.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT)
16 #define OCELOT_VCAP_IS1_VLAN_RECLASSIFY(ocelot, port) ((ocelot)->num_phys_ports + (port))
18 #define OCELOT_VCAP_IS2_MRP_REDIRECT(ocelot, port) ((ocelot)->num_phys_ports + (port))
19 #define OCELOT_VCAP_IS2_MRP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2)
20 #define OCELOT_VCAP_IS2_L2_PTP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2 + 1)
21 #define OCELOT_VCAP_IS2_IPV4_GEN_PTP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2 + 2)
22 #define OCELOT_VCAP_IS2_IPV4_EV_PTP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2 + 3)
23 #define OCELOT_VCAP_IS2_IPV6_GEN_PTP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2 + 4)
24 #define OCELOT_VCAP_IS2_IPV6_EV_PTP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2 + 5)
41 u16 tg_width; /* Type-group width (in bits) */
[all …]
/linux/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/
H A Dfp_operation.json5 … "BriefDescription": "This event counts architecturally executed floating-point move operation."
19 …"BriefDescription": "This event counts architecturally executed Advanced SIMD floating-point opera…
23 … "BriefDescription": "This event counts architecturally executed SVE floating-point operation."
27 …ption": "This event counts architecturally executed Advanced SIMD or SVE floating-point operation."
31 …"BriefDescription": "This event counts architecturally executed half-precision floating-point oper…
35 …ion": "This event counts architecturally executed Advanced SIMD half-precision floating-point oper…
39 …efDescription": "This event counts architecturally executed SVE half-precision floating-point oper…
43 …This event counts architecturally executed Advanced SIMD or SVE half-precision floating-point oper…
47 …"BriefDescription": "This event counts architecturally executed single-precision floating-point op…
51 …: "This event counts architecturally executed Advanced SIMD single-precision floating-point operat…
[all …]
/linux/arch/x86/include/asm/
H A Dsmap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
30 * SMAP enforcement is based on the _PAGE_BIT_USER bit in the page
31 * tables. The kernel is not allowed to touch pages with that bit set
32 * unless the AC bit is set.
51 * LASS enforcement is based on bit 63 of the virtual address. The
52 * kernel is not allowed to touch memory in the lower half of the
55 * Use lass_stac()/lass_clac() to toggle the AC bit for kernel data
58 * Even with the AC bit set, LASS will continue to block instruction
59 * fetches from the user half of the address space. To allow those,
/linux/drivers/net/ethernet/intel/igc/
H A Digc_phy.c1 // SPDX-License-Identifier: GPL-2.0
8 * igc_check_reset_block - Check if PHY reset is blocked
26 * igc_get_phy_id - Retrieve the PHY ID and revision
34 struct igc_phy_info *phy = &hw->phy; in igc_get_phy_id()
38 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igc_get_phy_id()
42 phy->id = (u32)(phy_id << 16); in igc_get_phy_id()
44 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igc_get_phy_id()
48 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in igc_get_phy_id()
49 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in igc_get_phy_id()
56 * igc_phy_has_link - Polls PHY for link
[all …]
/linux/drivers/mtd/spi-nor/
H A Dsfdp.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/mtd/spi-nor.h>
14 #define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb)
16 (((p)->parameter_table_pointer[2] << 16) | \
17 ((p)->parameter_table_pointer[1] << 8) | \
18 ((p)->parameter_table_pointer[0] << 0))
19 #define SFDP_PARAM_HEADER_PARAM_LEN(p) ((p)->length * 4)
23 #define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */
31 * Register Map Offsets for Multi-Chip
41 u8 nph; /* 0-base number of parameter headers */
[all …]
/linux/tools/testing/selftests/powerpc/tm/
H A Dtm-signal-context-chk-vsx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
34 #define VSX20 20 /* First VSX register to check in vsr20-vsr31 subset */
43 /* First context will be set with these values, i.e. non-speculative */
51 {-1, -2, -3, -4 },{-5, -6, -7, -8 },{-9, -10,-11,-12},
52 {-13,-14,-15,-16},{-17,-18,-19,-20},{-21,-22,-23,-24},
53 {-25,-26,-27,-28},{-29,-30,-31,-32},{-33,-34,-35,-36},
54 {-37,-38,-39,-40},{-41,-42,-43,-44},{-45,-46,-47,-48}
63 ucontext_t *tm_ucp = ucp->uc_link; in signal_usr1()
68 * FP registers (f0-31) overlap the most significant 64 bits of VSX in signal_usr1()
69 * registers vsr0-31, whilst VMX registers vr0-31, being 128-bit like in signal_usr1()
[all …]
/linux/Documentation/devicetree/bindings/dma/stm32/
H A Dst,stm32-mdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
21 3. A 32bit mask specifying the DMA channel configuration
22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
[all …]
/linux/drivers/net/ethernet/aquantia/atlantic/macsec/
H A Dmacsec_struct.h1 /* SPDX-License-Identifier: GPL-2.0-only */
13 /*! This is used to store the 48 bit value used to compare SA, DA or
14 * halfDA+half SA value.
17 /*! This is used to store the 16 bit ethertype value used for
21 /*! The match mask is per-nibble. 0 means don't care, i.e. every value
22 * will match successfully. The total data is 64 bit, i.e. 16 nibbles
29 * 3: compare half DA + half SA
52 /*! The 8 bit value used to compare with extracted value for byte 3. */
54 /*! The 8 bit value used to compare with extracted value for byte 2. */
56 /*! The 8 bit value used to compare with extracted value for byte 1. */
[all …]
/linux/arch/arm64/kvm/hyp/nvhe/
H A Dmm.c1 // SPDX-License-Identifier: GPL-2.0-only
54 return -EINVAL; in __pkvm_alloc_private_va_range()
61 return -ENOMEM; in __pkvm_alloc_private_va_range()
69 * pkvm_alloc_private_va_range - Allocates a private VA range.
169 size = end - start; in hyp_back_vmemmap()
201 return -EINVAL; in pkvm_cpu_set_vector()
234 kvm_pte_t pte, *ptep = slot->ptep; in fixmap_map_slot()
242 return (void *)slot->addr; in fixmap_map_slot()
252 kvm_pte_t *ptep = slot->ptep; in fixmap_clear_slot()
253 u64 addr = slot->addr; in fixmap_clear_slot()
[all …]
/linux/tools/testing/selftests/bpf/progs/
H A Dverifier_zext.c1 // SPDX-License-Identifier: GPL-2.0
35 r6 = 0xdeadbeefcafebabe ll; /* inject some value for r6's upper half */ \ in __flag()
36 if r8 != 0 goto 1f; /* fall-through cached first, branch pruned */ \ in __flag()
37 r6 = 32; /* full 64-bit def */ \ in __flag()
39 1: w6 = 32; /* 32-bit def, zext mark lost */ \ in __flag()
49 /* 32-bit ALU result read as 64-bit -> zext */
65 /* 32-bit ALU result read only as 32-bit -> no zext */
85 /* 64-bit definition is never zero extended */
101 /* Narrow load result read as 64-bit -> zext */
104 __msg("r1 = *(u32 *)(r10 -8){{ +}}; zext")
[all …]
/linux/arch/sparc/include/asm/
H A Dbbc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * bbc.h: Defines for BootBus Controller found on UltraSPARC-III
12 /* Register sizes are indicated by "B" (Byte, 1-byte),
13 * "H" (Half-word, 2 bytes), "W" (Word, 4 bytes) or
29 #define BBC_ES_DACT 0x14 /* [B] E* De-Assert Change Time */
30 #define BBC_ES_DABT 0x15 /* [B] E* De-Assert Bypass Time */
38 #define BBC_I2C_0_S1 0x2e /* [B] I2C ctrlr-0 reg S1 */
39 #define BBC_I2C_0_S0 0x2f /* [B] I2C ctrlr-0 regs S0,S0',S2,S3*/
40 #define BBC_I2C_1_S1 0x30 /* [B] I2C ctrlr-1 reg S1 */
41 #define BBC_I2C_1_S0 0x31 /* [B] I2C ctrlr-1 regs S0,S0',S2,S3*/
[all …]
/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_pfvf_msg.h1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
2 /* Copyright(c) 2015 - 2021 Intel Corporation */
9 * PF<->VF Gen2 Messaging format
11 * The PF has an array of 32-bit PF2VF registers, one for each VF. The
16 * The bottom half is for PF->VF messages. In particular when the first
17 * bit of this register (bit 0) gets set an interrupt will be triggered
19 * The top half is for VF->PF messages. In particular when the first bit
20 * of this half of register (bit 16) gets set an interrupt will be triggered
30 * +-----------------------------------------------+
36 * Message-specific Data/Reserved
[all …]
/linux/Documentation/crypto/
H A Ddescore-readme.rst1 .. SPDX-License-Identifier: GPL-2.0
13 ------------------------------------------------------------------------------
15 des - fast & portable DES encryption & decryption.
42 2. PORTABILITY to any byte-addressable host with a 32bit unsigned C type
43 3. Plug-compatible replacement for KERBEROS's low-level routines.
46 register-starved machines. My discussions with Richard Outerbridge,
51 up in a parameterized fashion so it can easily be modified by speed-daemon
58 compile on a SPARCStation 1 (cc -O4, gcc -O2):
60 this code (byte-order independent):
62 - 30us per encryption (options: 64k tables, no IP/FP)
[all …]

12345678910>>...36