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/illumos-gate/usr/src/uts/common/io/chxge/com/
H A Dgmac.h112 struct gmac { struct
118 extern struct gmac t1_pm3393_ops; argument
119 extern struct gmac t1_chelsio_mac_ops;
120 extern struct gmac t1_vsc7321_ops;
121 extern struct gmac t1_vsc7326_ops;
122 extern struct gmac t1_ixf1010_ops;
123 extern struct gmac t1_dummy_mac_ops;
H A Dch_mac.c26 #include "gmac.h"
89 /* Set parent gmac interrupt. */ in mac_intr_enable()
115 /* Set parent gmac interrupt. */ in mac_intr_disable()
141 /* Set parent gmac interrupt. */ in mac_intr_clear()
416 struct gmac t1_chelsio_mac_ops = {
H A Dcommon.h170 struct gmac;
190 struct gmac *gmac; member
H A Dfpga_defs.h61 * GMAC interrupt register addresses
67 /* GMAC Cause/Enable bits */
123 /* GMAC registers */
H A Dvsc7321.c43 #include "gmac.h"
466 struct gmac t1_vsc7321_ops = {
H A Dch_subr.c30 #include "gmac.h"
1378 adapter->params.stats_update_period = bi->gmac->stats_update_period; in t1_init_sw_modules()
1461 if (bi->gmac->reset) in t1_init_sw_modules()
1462 bi->gmac->reset(adapter); in t1_init_sw_modules()
1477 adapter->port[i].mac = mac = bi->gmac->create(adapter, i); in t1_init_sw_modules()
H A Dixf1010.c26 #include "gmac.h"
531 struct gmac t1_ixf1010_ops = {
H A Dvsc7326.c28 #include "gmac.h"
761 struct gmac t1_vsc7326_ops = {
H A Dpm3393.c28 #include "gmac.h"
926 struct gmac t1_pm3393_ops = {
/illumos-gate/usr/src/uts/common/io/yge/
H A Dyge.h448 /* Receive GMAC FIFO (YUKON and Yukon-2), use MR_ADDR() to access */
449 #define RX_GMF_EA 0x0c40 /* 32 bit Rx GMAC FIFO End Address */
450 #define RX_GMF_AF_THR 0x0c44 /* 32 bit Rx GMAC FIFO Almost Full Thresh. */
451 #define RX_GMF_CTRL_T 0x0c48 /* 32 bit Rx GMAC FIFO Control/Test */
452 #define RX_GMF_FL_MSK 0x0c4c /* 32 bit Rx GMAC FIFO Flush Mask */
453 #define RX_GMF_FL_THR 0x0c50 /* 32 bit Rx GMAC FIFO Flush Threshold */
458 #define RX_GMF_WP 0x0c60 /* 32 bit Rx GMAC FIFO Write Pointer */
459 #define RX_GMF_WLEV 0x0c68 /* 32 bit Rx GMAC FIFO Write Level */
460 #define RX_GMF_RP 0x0c70 /* 32 bit Rx GMAC FIFO Read Pointer */
461 #define RX_GMF_RLEV 0x0c78 /* 32 bit Rx GMAC FIFO Read Level */
[all …]
H A Dyge.c353 uint32_t gmac; in yge_mii_notify() local
376 gmac = GMC_PAUSE_ON; in yge_mii_notify()
380 gmac = GMC_PAUSE_ON; in yge_mii_notify()
384 gmac = GMC_PAUSE_ON; in yge_mii_notify()
389 gmac = GMC_PAUSE_OFF; in yge_mii_notify()
412 gmac = GMC_PAUSE_OFF; in yge_mii_notify()
423 /* write out the flow control gmac setting */ in yge_mii_notify()
424 CSR_WRITE_4(dev, MR_ADDR(port->p_port, GMAC_CTRL), gmac); in yge_mii_notify()
754 /* Reset GPHY/GMAC Control */ in yge_reset()
759 /* GMAC Control reset. */ in yge_reset()
[all …]
/illumos-gate/usr/src/uts/common/io/sfxge/common/
H A Defx_regs.h2304 * GMAC configuration register 1
2339 * GMAC configuration register 2
2364 * GMAC IPG register
2381 * GMAC half duplex register
2404 * GMAC maximum frame length register
2415 * GMAC test register
2432 * GMAC station address register 1
2449 * GMAC station address register 2
2462 * GMAC FIFO configuration register 0
2501 * GMAC FIFO configuration register 1
[all …]
H A Defx_port.c175 "GMAC",
H A Defx_regs_mcdi.h5187 /* enum: GMAC. */
5413 /* The MTU is the MTU programmed directly into the XMAC/GMAC (inclusive of
5446 /* The MTU is the MTU programmed directly into the XMAC/GMAC (inclusive of
5580 * by the MC as it switches between the GMAC and XMAC. The MC will write out
5758 /* enum: Start of GMAC stats buffer space, for Siena only. */
5760 /* enum: End of GMAC stats buffer space, for Siena only. */
/illumos-gate/usr/src/uts/common/fs/smbclnt/netsmb/
H A Dnsmb_kcrypt.h65 CK_AES_GMAC_PARAMS gmac; member
/illumos-gate/usr/src/uts/common/crypto/io/
H A Daes.c564 * GMAC: plaintext length must be zero in aes_decrypt()
740 * CCM, GCM, and GMAC mechanisms never return plaintext for update in aes_decrypt_update()
977 * CTR, CCM, CMAC, GCM, and GMAC modes do not require that plaintext in aes_encrypt_atomic()
1130 * CCM, GCM, CTR, and GMAC modes do not require that ciphertext in aes_decrypt_atomic()
H A Ddprov.c528 /* AES-GMAC */
/illumos-gate/usr/src/uts/common/io/chxge/
H A Doschtoe.h61 #define CFGDMP_GMACC 0x00010000 /* dump GMAC cause bits */
H A Dpe.c68 #include "gmac.h"
/illumos-gate/usr/src/data/hwdata/
H A Dpci.ids7677 0021 UniNorth GMAC (Sun GEM)
7679 0024 UniNorth/Pangea GMAC (Sun GEM)
7691 0032 UniNorth 2 GMAC (Sun GEM)
7711 004c K2 GMAC (Sun GEM)
7729 006b Intrepid2 GMAC (Sun GEM)