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/linux/drivers/remoteproc/
H A Dqcom_common.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
39 * struct minidump_region - Minidump region
55 * struct minidump_subsystem - Subsystem's SMEM Table of content
73 * struct minidump_global_toc - Global Table of Content
99 list_for_each_entry_safe(entry, tmp, &rproc->dump_segments, node) { in qcom_minidump_cleanup()
100 list_del(&entry->node); in qcom_minidump_cleanup()
101 kfree(entry->priv); in qcom_minidump_cleanup()
117 if (WARN_ON(!list_empty(&rproc->dump_segments))) { in qcom_add_minidump_segments()
118 dev_err(&rproc->dev, "dump segment list already populated\n"); in qcom_add_minidump_segments()
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H A Dqcom_common.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 struct qcom_glink_smem *edge; member
27 struct qcom_smd_edge *edge; member
49 void qcom_add_glink_subdev(struct rproc *rproc, struct qcom_rproc_glink *glink,
51 void qcom_remove_glink_subdev(struct rproc *rproc, struct qcom_rproc_glink *glink);
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,glink-rpm-edge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,glink-rpm-edge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm G-Link RPM edge
10 Qualcomm G-Link edge, a FIFO based mechanism for communication with Resource
14 - Bjorn Andersson <andersson@kernel.org>
18 const: qcom,glink-rpm
22 Name of the edge, used for debugging and identification purposes. The
30 - description: rpm_hlos mailbox in APCS
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H A Dqcom,glink-edge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,glink-edge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm G-Link Edge communication channel nodes
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 Qualcomm G-Link subnode represents communication edge, channels and devices
20 - qcom,glink-channels
27 - qcom,glink-channels
34 - qcom,glink-channels
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H A Dqcom,rpm-proc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,rpm-proc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
12 - Stephan Gerhold <stephan@gerhold.net>
17 +--------------------------------------------+
18 | RPM subsystem (qcom,rpm-proc) |
20 reset | +---------------+ +-----+ +-----+ |
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H A Dqcom,sc7180-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7180-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
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H A Dqcom,sc7280-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7280-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
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H A Dqcom,pas-common.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,pas-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
20 clock-names:
30 - description: Watchdog interrupt
31 - description: Fatal interrupt
32 - description: Ready interrupt
33 - description: Handover interrupt
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H A Dqcom,sc7280-adsp-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
19 - qcom,sc7280-adsp-pil
23 - description: qdsp6ss register
24 - description: efuse q6ss register
28 - description: Phandle to apps_smmu node with sid mask
32 - description: Watchdog interrupt
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H A Dqcom,q6v5.txt6 - compatible:
10 "qcom,ipq8074-wcss-pil"
11 "qcom,qcs404-wcss-pil"
13 - reg:
15 Value type: <prop-encoded-array>
19 - reg-names:
24 - interrupts-extended:
26 Value type: <prop-encoded-array>
27 Definition: reference to the interrupts that match interrupt-names
29 - interrupt-names:
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H A Dqcom,qcs404-pas.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 - qcom,qcs404-adsp-pas
20 - qcom,qcs404-cdsp-pas
21 - qcom,qcs404-wcss-pas
28 - description: XO clock
30 clock-names:
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H A Dqcom,sdx55-pas.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sdx55-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 - qcom,sdx55-mpss-pas
26 - description: XO clock
28 clock-names:
30 - const: xo
35 interrupt-names:
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H A Dqcom,sm6375-pas.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sm6375-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 - qcom,sm6375-adsp-pas
20 - qcom,sm6375-cdsp-pas
21 - qcom,sm6375-mpss-pas
28 - description: XO clock
30 clock-names:
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H A Dqcom,sc8280xp-pas.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc8280xp-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 - qcom,sc8280xp-adsp-pas
20 - qcom,sc8280xp-nsp0-pas
21 - qcom,sc8280xp-nsp1-pas
28 - description: XO clock
30 clock-names:
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H A Dqcom,sm6350-pas.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sm6350-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 - qcom,sm6350-adsp-pas
20 - qcom,sm6350-cdsp-pas
21 - qcom,sm6350-mpss-pas
28 - description: XO clock
30 clock-names:
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H A Dqcom,sm8150-pas.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sm8150-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 - qcom,sm8150-adsp-pas
20 - qcom,sm8150-cdsp-pas
21 - qcom,sm8150-mpss-pas
22 - qcom,sm8150-slpi-pas
23 - qcom,sm8250-adsp-pas
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H A Dqcom,sc7180-pas.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 - qcom,sc7180-adsp-pas
20 - qcom,sc7180-mpss-pas
21 - qcom,sc7280-adsp-pas
22 - qcom,sc7280-cdsp-pas
23 - qcom,sc7280-mpss-pas
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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,smd-rpm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,smd-rpm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Resource Power Manager (RPM) over SMD/GLINK
15 The SMD or GLINK information for the RPM edge should be filled out. See
16 qcom,smd.yaml for the required edge properties. All SMD/GLINK related
23 Refer to Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml
28 - Andy Gross <agross@kernel.org>
29 - Bjorn Andersson <bjorn.andersson@linaro.org>
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/linux/drivers/rpmsg/
H A Dqcom_glink_smem.c1 // SPDX-License-Identifier: GPL-2.0
42 struct qcom_glink *glink; member
66 struct qcom_glink_smem *smem = pipe->smem; in glink_smem_rx_avail()
72 if (!pipe->fifo) { in glink_smem_rx_avail()
73 fifo = qcom_smem_get(smem->remote_pid, in glink_smem_rx_avail()
81 pipe->fifo = fifo; in glink_smem_rx_avail()
82 pipe->native.length = len; in glink_smem_rx_avail()
85 head = le32_to_cpu(*pipe->head); in glink_smem_rx_avail()
86 tail = le32_to_cpu(*pipe->tail); in glink_smem_rx_avail()
89 return pipe->native.length - tail + head; in glink_smem_rx_avail()
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/linux/Documentation/devicetree/bindings/misc/
H A Dqcom,fastrpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 The FastRPC implements an IPC (Inter-Processor Communication)
25 - adsp
26 - mdsp
27 - sdsp
28 - cdsp
29 - cdsp1
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dqcom,mpm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/qcom,mpm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawn.guo@linaro.org>
14 MSM Power Manager (MPM) that is in always-on domain. In addition to managing
21 - $ref: /schemas/interrupt-controller.yaml#
26 - const: qcom,mpm
34 qcom,rpm-msg-ram:
49 interrupt-controller: true
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/linux/arch/arm64/boot/dts/qcom/
H A Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
12 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&intc>;
20 sleep_clk: sleep-clk {
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H A Dqcm2290.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
10 #include <dt-bindings/clock/qcom,qcm2290-gpucc.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/interconnect/qcom,qcm2290.h>
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H A Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/gpio/gpio.h>
14 interrupt-parent = <&intc>;
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H A Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/firmware/qcom,scm.h>
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