Searched +full:fu540 +full:- +full:c000 +full:- +full:ccache (Results 1 – 5 of 5) sorted by relevance
/linux/Documentation/devicetree/bindings/cache/ |
H A D | sifive,ccache0.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Paul Walmsley <paul.walmsley@sifive.com> 16 acts as directory-based coherency manager. 24 - sifive,ccache0 25 - sifive,fu540-c000-ccache 26 - sifive,fu740-c000-ccache 29 - compatible 34 - items: [all …]
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/linux/arch/riscv/boot/dts/sifive/ |
H A D | fu740-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 /dts-v1/; 6 #include <dt-bindings/clock/sifive-fu740-prci.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 11 compatible = "sifive,fu740-c000", "sifive,fu740"; 23 #address-cells = <1>; 24 #size-cells = <0>; 28 i-cache-block-size = <64>; 29 i-cache-sets = <128>; [all …]
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H A D | fu540-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2018-2019 SiFive, Inc */ 4 /dts-v1/; 6 #include <dt-bindings/clock/sifive-fu540-prci.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 11 compatible = "sifive,fu540-c000", "sifive,fu540"; 23 #address-cells = <1>; 24 #size-cells = <0>; 28 i-cache-block-size = <64>; [all …]
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/linux/drivers/cache/ |
H A D | sifive_ccache.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2018-2022 SiFive, Inc. 9 #define pr_fmt(fmt) "CCACHE: " fmt 22 #include <asm/dma-noncoherent.h> 82 return -EINVAL; in ccache_write() 86 return -EINVAL; in ccache_write() 121 { .compatible = "sifive,fu540-c000-ccache" }, 122 { .compatible = "sifive,fu740-c000-ccache" }, 123 { .compatible = "starfive,jh7100-ccache", 198 if (this_leaf->level == level) in ccache_get_priv_group() [all …]
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/linux/arch/riscv/boot/dts/microchip/ |
H A D | mpfs.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2020-2021 Microchip Technology Inc */ 4 /dts-v1/; 5 #include "dt-bindings/clock/microchip,mpfs-clock.h" 8 #address-cells = <2>; 9 #size-cells = <2>; 14 #address-cells = <1>; 15 #size-cells = <0>; 16 timebase-frequency = <1000000>; 21 i-cache-block-size = <64>; [all …]
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