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Searched +full:fast +full:- +full:dvfs +full:- +full:event (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/mailbox/
H A Dmtk-gpueb-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * - Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
44 * struct mtk_gpueb_mbox_chan - per-channel runtime data
60 * struct mtk_gpueb_mbox_chan_desc - per-channel constant data
83 * mtk_gpueb_mbox_read_rx - read RX buffer from MMIO into channel's RX buffer
89 memcpy_fromio(buf, chan->ebm->mbox_mmio + chan->c->rx_offset, chan->c->rx_len); in mtk_gpueb_mbox_read_rx()
97 rx_sts = readl(ch->ebm->mbox_ctl + GPUEB_MBOX_CTL_RX_STS); in mtk_gpueb_mbox_isr()
99 if (rx_sts & BIT(ch->num)) { in mtk_gpueb_mbox_isr()
100 if (!atomic_cmpxchg(&ch->rx_status, 0, GPUEB_MBOX_FULL | GPUEB_MBOX_BLOCKED)) in mtk_gpueb_mbox_isr()
112 status = atomic_cmpxchg(&ch->rx_status, GPUEB_MBOX_FULL | GPUEB_MBOX_BLOCKED, in mtk_gpueb_mbox_thread()
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/linux/drivers/gpu/drm/imagination/
H A Dpvr_rogue_fwif_sf.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
47 * - --- ---- ---- ---- ---- ---- ---- ----
48 * 0-11: id number
49 * 12-15: group id number
50 * 16-19: number of parameters
51 * 20-27: unused
52 * 28-30: active: identify SF packet, otherwise regular int32
114 "UFO PR-Check: [0x%08.8x] is 0x%08.8x requires >= 0x%08.8x" },
116 "UFO SPM PR-Checks for FWCtx 0x%08.8x" },
118 …"UFO SPM special PR-Check: [0x%08.8x] is 0x%08.8x requires >= ????????, [0x%08.8x] is ???????? req…
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H A Dpvr_rogue_fwif.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
42 /* String used in pvrdebug -h output */
140 /* Firmware per-DM HWR states */
155 /* DM was identified as over-running and causing HWR */
157 /* DM was innocently affected by another DM over-running which caused HWR */
270 /* Identify whether MC config is P-P or P-S */
274 /* per-os firmware shared data */
297 /* Firmware trace time-stamp field breakup */
303 /* Extra debug-info (16 bits) */
307 /* Debug-info sub-fields */
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/linux/drivers/cpufreq/
H A Dscmi-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2021 ARM Ltd.
11 #include <linux/clk-provider.h>
50 priv = policy->driver_data; in scmi_cpufreq_get_rate()
52 ret = perf_ops->freq_get(ph, priv->domain_id, &rate, false); in scmi_cpufreq_get_rate()
59 * perf_ops->freq_set is not a synchronous, the actual OPP change will
66 struct scmi_data *priv = policy->driver_data; in scmi_cpufreq_set_target()
67 u64 freq = policy->freq_table[index].frequency; in scmi_cpufreq_set_target()
69 return perf_ops->freq_set(ph, priv->domain_id, freq * 1000, false); in scmi_cpufreq_set_target()
75 struct scmi_data *priv = policy->driver_data; in scmi_cpufreq_fast_switch()
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/linux/drivers/memory/samsung/
H A Dexynos5422-dmc.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/devfreq-event.h>
88 * Performance event types which are used for setting the preferred event
92 * the type of the event (register DREX_PEREV2CONFIG).
101 * struct dmc_opp_table - Operating level desciption
113 * struct exynos5_dmc - main structure describing DMC device
196 __val = (t_val) << (timing)->bit_beg; \
220 TIMING_FIELD("tW2W-C2C", 14, 14),
221 TIMING_FIELD("tR2R-C2C", 12, 12),
243 for (i = 0; i < dmc->num_counters; i++) { in exynos5_counters_set_event()
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/linux/kernel/sched/
H A Dfair.c1 // SPDX-License-Identifier: GPL-2.0
44 #include <linux/memory-tiers.h>
62 * The initial- and re-scaling of tunables is configurable
66 * SCHED_TUNABLESCALING_NONE - unscaled, always *1
67 * SCHED_TUNABLESCALING_LOG - scaled logarithmically, *1+ilog(ncpus)
68 * SCHED_TUNABLESCALING_LINEAR - scaled linear, *ncpus
75 * Minimal preemption granularity for CPU-bound tasks:
96 return -cpu; in arch_asym_cpu_priority()
116 * Amount of runtime to allocate from global (tg) to local (per-cfs_rq) pool
167 lw->weight += inc; in update_load_add()
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