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/linux/drivers/tty/serial/
H A Dzs.h1 /* SPDX-License-Identifier: GPL-2.0 */
29 int tx_stopped; /* Output is suspended. */
38 * Per-SCC state for locking and the interrupt handler.
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
79 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
81 #define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
82 #define RES_Tx_P 0x28 /* Reset TxINT Pending */
83 #define ERR_RES 0x30 /* Error Reset */
84 #define RES_H_IUS 0x38 /* Reset highest IUS */
86 #define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
[all …]
H A Dip22zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
58 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
60 #define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
61 #define RES_Tx_P 0x28 /* Reset TxINT Pending */
62 #define ERR_RES 0x30 /* Error Reset */
63 #define RES_H_IUS 0x38 /* Reset highest IUS */
65 #define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
66 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
67 #define RES_EOM_L 0xC0 /* Reset EOM latch */
[all …]
H A Dsunzilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
50 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
52 #define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
53 #define RES_Tx_P 0x28 /* Reset TxINT Pending */
54 #define ERR_RES 0x30 /* Error Reset */
55 #define RES_H_IUS 0x38 /* Reset highest IUS */
57 #define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
58 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
59 #define RES_EOM_L 0xC0 /* Reset EOM latch */
[all …]
H A Dpmac_zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
64 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
66 return uap->mate; in pmz_get_port_A()
78 writeb(reg, port->control_reg); in read_zsreg()
79 return readb(port->control_reg); in read_zsreg()
85 writeb(reg, port->control_reg); in write_zsreg()
86 writeb(value, port->control_reg); in write_zsreg()
91 return readb(port->data_reg); in read_zsdata()
96 writeb(data, port->data_reg); in write_zsdata()
[all …]
/linux/drivers/net/hamradio/
H A Dz8530.h1 /* SPDX-License-Identifier: GPL-2.0 */
26 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
28 #define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
29 #define RES_Tx_P 0x28 /* Reset TxINT Pending */
30 #define ERR_RES 0x30 /* Error Reset */
31 #define RES_H_IUS 0x38 /* Reset highest IUS */
33 #define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
34 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
35 #define RES_EOM_L 0xC0 /* Reset EOM latch */
39 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ul-var-som-concerto.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Support for Variscite MX6 Concerto Carrier board with the VAR-SOM-MX6UL
10 #include "imx6ul-var-som.dtsi"
11 #include <dt-bindings/leds/common.h>
14 model = "Variscite VAR-SOM-MX6UL Concerto Board";
15 compatible = "variscite,mx6ulconcerto", "variscite,var-som-imx6ul", "fsl,imx6ul";
18 stdout-path = &uart1;
21 gpio-keys {
22 compatible = "gpio-keys";
23 pinctrl-names = "default";
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H A Dimx6ul-kontron-sl-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
12 stdout-path = &uart4;
22 cs-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_ecspi2>;
28 compatible = "mxicy,mx25v8035f", "jedec,spi-nor";
30 spi-max-frequency = <50000000>;
33 compatible = "fixed-partitions";
34 #address-cells = <1>;
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sc7280-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7280-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
[all …]
/linux/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/sprd,sc9860-clk.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 compatible = "simple-bus";
17 #address-cells = <2>;
18 #size-cells = <2>;
66 ap-apb@70000000 {
67 compatible = "simple-bus";
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dsilabs,si5341.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mike Looijmans <mike.looijmans@topic.nl>
18 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf
20 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf
22 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf
24 The Si5341 and Si5340 are programmable i2c clock generators with up to 10 output
33 chip at boot, in case you have a (pre-)programmed device. If the PLL is not
42 - silabs,si5340
[all …]
/linux/drivers/comedi/drivers/
H A Drtd520.c1 // SPDX-License-Identifier: GPL-2.0+
6 * COMEDI - Linux Control and Measurement Device Interface
13 * Devices: [Real Time Devices] DM7520HR-1 (DM7520), DM7520HR-8,
14 * PCI4520 (PCI4520), PCI4520-8
16 * Status: Works. Only tested on DM7520-8. Not SMP safe.
24 * The PCI4520 is a PCI card. The DM7520 is a PC/104-plus card.
30 * 2 bits output
40 * These boards can support external multiplexors and multi-board
71 * Analog-In supports instruction and command mode.
73 * With DMA, you can sample at 1.15Mhz with 70% idle on a 400Mhz K6-2
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn-bsh-smm-s2pro.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include "imx8mn-bsh-smm-s2-common.dtsi"
10 #include <dt-bindings/sound/tlv320aic31xx.h>
14 compatible = "bsh,imx8mn-bsh-smm-s2pro", "fsl,imx8mn";
21 sound-tlv320aic31xx {
22 compatible = "fsl,imx-audio-tlv320aic31xx";
23 model = "tlv320aic31xx-hifi";
24 audio-cpu = <&sai3>;
25 audio-codec = <&tlv320dac3101>;
[all …]
H A Dimx943-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2024-2025 NXP
6 /dts-v1/;
11 compatible = "fsl,imx943-evk", "fsl,imx94";
23 bt_sco_codec: bt-sco-codec {
24 compatible = "linux,bt-sco";
25 #sound-dai-cells = <1>;
29 stdout-path = &lpuart1;
33 compatible = "dmic-codec";
34 #sound-dai-cells = <0>;
[all …]
H A Dimx8mq-mnt-reform2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2021 MNT Research GmbH
8 /dts-v1/;
10 #include "imx8mq-nitrogen-som.dtsi"
14 compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq";
15 chassis-type = "laptop";
18 compatible = "pwm-backlight";
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_backlight>;
22 power-supply = <&reg_main_usb>;
[all …]
H A Dimx8mm-prt8mm.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/usb/pd.h>
17 stdout-path = &uart4;
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_gpio_leds>;
30 debug-led0 {
33 linux,default-trigger = "heartbeat";
36 debug-led1 {
[all …]
H A Dimx8mq-nitrogen-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 compatible = "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq";
14 stdout-path = &uart1;
17 reg_1p8v: regulator-fixed-1v8 {
18 compatible = "regulator-fixed";
19 regulator-name = "1P8V";
20 regulator-min-microvolt = <1800000>;
21 regulator-max-microvolt = <1800000>;
24 reg_snvs: regulator-fixed-snvs {
25 compatible = "regulator-fixed";
[all …]
H A Dimx95-19x19-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/usb/pd.h>
15 #define BRD_SM_CTRL_SD3_WAKE 0x8000 /* PCAL6408A-0 */
16 #define BRD_SM_CTRL_PCIE1_WAKE 0x8001 /* PCAL6408A-4 */
17 #define BRD_SM_CTRL_BT_WAKE 0x8002 /* PCAL6408A-5 */
18 #define BRD_SM_CTRL_PCIE2_WAKE 0x8003 /* PCAL6408A-6 */
19 #define BRD_SM_CTRL_BUTTON 0x8004 /* PCAL6408A-7 */
23 compatible = "fsl,imx95-19x19-evk", "fsl,imx95";
[all …]
H A Dimx8mq-tqma8mq-mba8mx.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2019-2021 TQ-Systems GmbH
6 /dts-v1/;
8 #include "imx8mq-tqma8mq.dtsi"
12 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ on MBa8Mx";
13 compatible = "tq,imx8mq-tqma8mq-mba8mx", "tq,imx8mq-tqma8mq", "fsl,imx8mq";
14 chassis-type = "embedded";
24 extcon_usbotg: extcon-usbotg0 {
25 compatible = "linux,extcon-usb-gpio";
26 pinctrl-names = "default";
[all …]
/linux/Documentation/devicetree/bindings/watchdog/
H A Dfsl-imx-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/fsl-imx-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
17 - const: fsl,imx21-wdt
18 - items:
19 - enum:
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dphy-rockchip-naneng-combphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3528-naneng-combphy
16 - rockchip,rk3562-naneng-combphy
17 - rockchip,rk3568-naneng-combphy
18 - rockchip,rk3576-naneng-combphy
19 - rockchip,rk3588-naneng-combphy
[all …]
/linux/arch/powerpc/boot/
H A Dwrapper2 # SPDX-License-Identifier: GPL-2.0-only
7 # and/or a device-tree blob, and creates a bootable zImage for a
11 # -o zImage specify output file
12 # -p platform specify platform (links in $platform.o)
13 # -i initrd specify initrd file
14 # -d devtree specify device-tree blob
15 # -s tree.dts specify device-tree source file (needs dtc installed)
16 # -e esm_blob specify ESM blob for secure images
17 # -c cache $kernel.strip.gz (use if present & newer, else make)
18 # -C prefix specify command prefix for cross-building tools
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-a23-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun6i-rtc.h>
48 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
49 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
[all …]
/linux/drivers/hid/
H A Dhid-wiimote-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) 2011-2013 David Herrmann <dh.herrmann@gmail.com>
17 #include "hid-ids.h"
18 #include "hid-wiimote.h"
20 /* output queue handling */
28 if (!hdev->ll_driver->output_report) in wiimote_hid_send()
29 return -ENODEV; in wiimote_hid_send()
33 return -ENOMEM; in wiimote_hid_send()
50 spin_lock_irqsave(&wdata->queue.lock, flags); in wiimote_queue_worker()
52 while (wdata->queue.head != wdata->queue.tail) { in wiimote_queue_worker()
[all …]
/linux/drivers/net/ethernet/netronome/nfp/flower/
H A Dmain.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2017-2018 Netronome Systems, Inc. */
89 * struct nfp_fl_tunnel_offloads - priv data for tunnel offloads
109 * struct nfp_tun_neigh_lag - lag info
119 * struct nfp_tun_neigh - basic neighbour data
122 * @port_id: NFP port to output packet on - associated with source IPv4
131 * struct nfp_tun_neigh_ext - extended neighbour data
143 * struct nfp_tun_neigh_v4 - neighbour/route entry on the NFP for IPv4
147 * @ext: Neighbour/route extended info
154 struct nfp_tun_neigh_ext ext; member
[all …]
/linux/drivers/i2c/busses/
H A Di2c-octeon-core.c2 * (C) Copyright 2009-2010
3 * Nokia Siemens Networks, michael.lawnick.ext@nsn.com
5 * Portions Copyright (C) 2010 - 2016 Cavium, Inc.
22 #include "i2c-octeon-core.h"
33 i2c->int_disable(i2c); in octeon_i2c_isr()
34 wake_up(&i2c->queue); in octeon_i2c_isr()
45 * octeon_i2c_wait - wait for the IFLG to be set
58 if (i2c->broken_irq_mode) { in octeon_i2c_wait()
59 u64 end = get_jiffies_64() + i2c->adap.timeout; in octeon_i2c_wait()
65 return octeon_i2c_test_iflg(i2c) ? 0 : -ETIMEDOUT; in octeon_i2c_wait()
[all …]

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