| /freebsd/sys/arm/ti/am335x/ |
| H A D | am335x_musb.c | 1 /*-
99 bus_write_4((sc)->sc_mem_res[idx], (reg), (val)); \
102 #define USB_READ4(sc, idx, reg) bus_read_4((sc)->sc_mem_res[idx], (reg))
112 { -1, 0, 0 }
141 if (sc->sc_otg.sc_mode == MUSB2_DEVICE_MODE) in musbotg_vbus_poll()
142 musbotg_vbus_interrupt(&sc->sc_otg, 1); in musbotg_vbus_poll()
145 musbotg_vbus_interrupt(&sc->sc_otg, stat & 1); in musbotg_vbus_poll()
159 struct musbotg_super_softc *ssc; in musbotg_clocks_on() local
163 ssc = sc->sc_platform_data; in musbotg_clocks_on()
165 reg = SYSCON_READ_4(ssc->syscon, USB_CTRL[sc->sc_id]); in musbotg_clocks_on()
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| /freebsd/sys/dev/isci/scil/ |
| H A D | scu_bios_definitions.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
64 * stand-alone where the library is excluded. By excluding
208 * in APC mode, if ANY of the phy mask is non-zero,
230 * Spread Spectrum Clocking (SSC) setting for Tx:
306 * Operational Note: The following Look-Up-Table registers are engaged
308 * - Software programs the Link Layer AFE Look Up Table Control
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| H A D | scic_sds_phy.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
83 // Maximum arbitration wait time in micro-seconds
115 this_phy->transport_layer_registers = transport_layer_registers; in scic_sds_phy_transport_layer_initialization()
119 // Hardware team recommends that we enable the STP prefetch for all transports in scic_sds_phy_transport_layer_initialization()
156 this_phy->link_layer_registers = link_layer_registers; in scic_sds_phy_link_layer_initialization()
172 SCU_SAS_TIDNL_WRITE(this_phy, this_phy->phy_index); in scic_sds_phy_link_layer_initialization()
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| H A D | scic_config_parameters.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
115 * This field specifies the NOTIFY (ENABLE SPIN UP) primitive
138 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
139 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
140 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
243 * comprehensive 1.1 version of enabling SSC parameters.
|
| /freebsd/sys/arm64/rockchip/ |
| H A D | rk3568_combphy.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
49 #include <contrib/device-tree/include/dt-bindings/phy/phy.h>
57 {"rockchip,rk3568-naneng-combphy", 1},
165 rk3568_combphy_enable(struct phynode *phynode, bool enable) in rk3568_combphy_enable() argument
171 if (enable == false) in rk3568_combphy_enable()
174 switch (sc->mode) { in rk3568_combphy_enable()
179 bus_write_4(sc->mem, PHYREG7, in rk3568_combphy_enable()
183 bus_write_4(sc->mem, PHYREG15, in rk3568_combphy_enable()
184 bus_read_4(sc->mem, PHYREG15) | PHYREG15_CTLE_EN); in rk3568_combphy_enable()
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ti/ |
| H A D | dpll.txt | 4 register-mapped DPLL with usually two selectable input clocks
9 sub-types, which effectively result in slightly different setup
12 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
15 - compatible : shall be one of:
16 "ti,omap3-dpll-clock",
17 "ti,omap3-dpll-core-clock",
18 "ti,omap3-dpll-per-clock",
19 "ti,omap3-dpll-per-j-type-clock",
20 "ti,omap4-dpll-clock",
21 "ti,omap4-dpll-x2-clock",
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| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | renesas,usb3-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,usb3-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car generation 3 USB 3.0 PHY
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - enum:
16 - renesas,r8a774a1-usb3-phy # RZ/G2M
17 - renesas,r8a774b1-usb3-phy # RZ/G2N
18 - renesas,r8a774e1-usb3-phy # RZ/G2H
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| H A D | phy-rockchip-naneng-combphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3568-naneng-combphy
16 - rockchip,rk3588-naneng-combphy
23 - description: reference clock
24 - description: apb clock
25 - description: pipe clock
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| H A D | brcm-sata-phy.txt | 4 - compatible: should be one or more of
5 "brcm,bcm7216-sata-phy"
6 "brcm,bcm7425-sata-phy"
7 "brcm,bcm7445-sata-phy"
8 "brcm,iproc-ns2-sata-phy"
9 "brcm,iproc-nsp-sata-phy"
10 "brcm,phy-sata3"
11 "brcm,iproc-sr-sata-phy"
12 "brcm,bcm63138-sata-phy"
13 - address-cells: should be 1
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| H A D | phy-cadence-torrent.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
22 - cdns,torrent-phy
23 - ti,j7200-serdes-10g
24 - ti,j721e-serdes-10g
26 '#address-cells':
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| H A D | brcm,sata-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/brcm,sata-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <f.fainelli@gmail.com>
14 pattern: "^sata[-|_]phy(@.*)?$"
18 - items:
19 - enum:
20 - brcm,bcm7216-sata-phy
21 - brcm,bcm7425-sata-phy
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| H A D | phy-miphy28lp.txt | 8 - compatible : Should be "st,miphy28lp-phy".
9 - st,syscfg : Should be a phandle of the system configuration register group
12 Required nodes : A sub-node is required for each channel the controller
14 'reg' and 'reg-names' properties are used inside these
19 - #phy-cells : Should be 1 (See second example)
21 - PHY_TYPE_SATA
22 - PHY_TYPE_PCI
23 - PHY_TYPE_USB3
24 - reg : Address and length of the register set for the device.
25 - reg-names : The names of the register addresses corresponding to the registers
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| /freebsd/sys/dev/usb/serial/ |
| H A D | usb_serial.c | 3 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
6 * Copyright (c) 2001-2003, 2005, 2008
32 /*-
130 static int ucom_cons_unit = -1;
199 ucom_unrhdr = new_unrhdr(0, UCOM_UNIT_MAX - 1, NULL); in ucom_init()
202 SYSINIT(ucom_init, SI_SUB_KLD - 1, SI_ORDER_ANY, ucom_init, NULL);
218 SYSUNINIT(ucom_uninit, SI_SUB_KLD - 3, SI_ORDER_ANY, ucom_uninit, NULL);
234 return (-1); in ucom_unit_alloc()
261 * before calling into the ucom-layer!
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| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | brcm,stb-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jim Quinlan <james.quinlan@broadcom.com>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm4908-pcie
18 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
19 - brcm,bcm7216-pcie # Broadcom 7216 Arm
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| /freebsd/sys/contrib/device-tree/src/arm/microchip/ |
| H A D | sama5d3xmb.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3xmb.dts - Device Tree file for SAMA5D3x mother board
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
21 bus-width = <4>;
22 cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
31 spi-max-frequency = <50000000>;
36 ssc0: ssc@f0008000 {
37 atmel,clk-from-rk-pin;
43 * can not enable audio when i2c0 disabled
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| H A D | sama5d3xmb_cmp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d3xmb_cmp.dts - Device Tree file for SAMA5D3x CMP mother board
10 compatible = "atmel,sama5d3xmb-cmp", "atmel,sama5d3xcm-cmp", "atmel,sama5d3", "atmel,sama5";
15 pinctrl-names = "default";
16 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
20 bus-width = <4>;
21 cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
30 spi-max-frequency = <50000000>;
35 ssc0: ssc@f0008000 {
36 atmel,clk-from-rk-pin;
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| H A D | at91-sama5d4ek.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d4ek.dts - Device Tree file for SAMA5D4 Evaluation Kit
8 /dts-v1/;
12 model = "Atmel SAMA5D4-EK";
16 stdout-path = "serial0:115200n8";
25 clock-frequency = <32768>;
29 clock-frequency = <12000000>;
36 pinctrl-names = "default";
37 pinctrl-0 = <
45 /* The vref depends on JP22 of EK. If connect 1-2 then use 3.3V. connect 2-3 use 3.0V */
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| H A D | sama5d4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
9 #include <dt-bindings/clock/at91.h>
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/mfd/at91-usart.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
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| /freebsd/sys/cam/scsi/ |
| H A D | scsi_sa.h | 1 /*-
5 * SPDX-License-Identifier: BSD-2-Clause
49 #define RBL_GRAN(rblim) ((rblim)->gran & RBL_GRAN_MASK)
158 * Format tape media. The CDB opcode is the same as the disk-specific
197 #define SMH_SA_BUF_MODE_SIBUF 0x10 /* Single-Initiator buffering */
198 #define SMH_SA_BUF_MODE_MIBUF 0x20 /* Multi-Initiator buffering */
203 * Sequential-access specific mode page numbers.
210 #define SA_DATA_COMPRESSION_PAGE 0x0f /* SCSI-3 */
216 /* See SCSI-II spec 9.3.3.1 */
235 /* from SCSI-3: SSC-4 Working draft (2/14) 8.3.3 */
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| /freebsd/share/man/man4/ |
| H A D | sa.4 | 65 .Bl -enum
68 referred to as sub-mode 00 below.
84 .Sh SUB-MODES
85 The sub-modes differ in the action taken when the device is closed:
86 .Bl -tag -width XXXX
110 block-size modes.
112 .Tn QIC Ns -type
113 devices run in fixed block-size mode, where most nine-track tapes and
114 many new cartridge formats allow variable block-size.
116 .Bl -inset
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| H A D | mtio.4 | 54 the name of the no-rewind devices.
68 will over write the second end-of-file marker.
80 .Bd -literal
93 /* structure for MTIOCTOP - mag tape op command */
100 #define MTWEOF 0 /* write an end-of-file record */
108 #define MTCACHE 8 /* enable controller cache */
127 #define MTRETENS 15 /* re-tension tape */
132 #define MTWEOFI 20 /* write an end-of-file record without waiting*/
158 /* structure for MTIOCGET - mag tape get status command */
165 /* end device-dependent registers */
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| /freebsd/sys/dev/cesa/ |
| H A D | cesa.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (C) 2009-2011 Semihalf.
32 * +------------------------+ <= sc->sc_sram_base_va + CESA_SRAM_SIZE
36 * +------------------------+ <= sc->sc_sram_base_va + CESA_DATA(0)
38 * +------------------------+
40 * +------------------------+ <= sc->sc_sram_base_va
90 { -1, 0 }
122 dev = sc->sc_dev; in cesa_dump_cshd()
124 device_printf(dev, "\t\tconfig: 0x%08X\n", cshd->cshd_config); in cesa_dump_cshd()
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| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt6795-sony-xperia-m5.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
14 compatible = "sony,xperia-m5", "mediatek,mt6795";
15 chassis-type = "handset";
26 compatible = "led-backlight";
29 default-brightness-level = <300>;
32 led-controller-display {
33 compatible = "pwm-leds";
35 disp_led_pwm: led-0 {
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| /freebsd/usr.bin/mt/ |
| H A D | mt.1 | 66 .Bl -tag -width ".Cm erase"
70 end-of-file (EOF) marks at the current position.
75 end-of-file (EOF) marks at the current position.
116 .Bl -tag -width ".Cm geteotmodel"
128 by the number of end-of-file marks.
138 Re-tension the tape.
183 .Bl -tag -width ".Cm seteotmodel"
201 except 0 commands the drive to use variable-length blocks.
226 will be numbers other than -1, and there may be Flags reported as well.
245 other than -1.
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | SafeStack.cpp | 1 //===- SafeStack.cpp - Safe Stack Insertion -------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This pass splits the stack into the safe stack (kept as-is for LLVM backend)
15 //===----------------------------------------------------------------------===//
78 #define DEBUG_TYPE "safe-stack"
98 SafeStackUsePointerAddress("safestack-use-pointer-address",
101 static cl::opt<bool> ClColoring("safe-stack-coloring",
102 cl::desc("enable safe stack coloring"),
126 /// aligned to this value. We need to re-align the unsafe stack if the
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