/freebsd/sys/contrib/device-tree/Bindings/display/imx/ |
H A D | ldb.txt | 1 Device-Tree bindings for LVDS Display Bridge (ldb) 3 LVDS Display Bridge 6 The LVDS Display Bridge device tree node contains up to two lvds-channel 7 nodes describing each of the two LVDS encoder channels of the bridge. 10 - #address-cells : should be <1> 11 - #size-cells : should be <0> 12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb". 14 multiplexer in the front to select any of the four IPU display 16 - gpr : should be <&gpr> on i.MX53 and i.MX6q. 17 The phandle points to the iomuxc-gpr region containing the LVDS [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
H A D | fsl,imx8qxp-pxl2dpi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX8qxp Pixel Link to Display Pixel Interface 10 - Liu Ying <victor.liu@nxp.com> 13 The Freescale i.MX8qxp Pixel Link to Display Pixel Interface(PXL2DPI) 14 interfaces the pixel link 36-bit data output and the DSI controller’s 15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module 25 const: fsl,imx8qxp-pxl2dpi [all …]
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H A D | toshiba,tc358775.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/toshiba,tc358775.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Toshiba TC358775 DSI to LVDS bridge 10 - Vinay Simha BN <simhavcs@gmail.com> 15 MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane. 17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel 19 Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display 25 - toshiba,tc358765 [all …]
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H A D | ti,dlpc3433.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/ti,dlpc3433.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI DLPC3433 MIPI DSI to DMD bridge 10 - Jagan Teki <jagan@amarulasolutions.com> 11 - Christopher Vollo <chris@renewoutreach.org> 14 TI DLPC3433 is a MIPI DSI based display controller bridge 30 - 0x1b 31 - 0x1d [all …]
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H A D | ti,sn65dsi86.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi86.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SN65DSI86 DSI to eDP bridge chip 10 - Douglas Anderson <dianders@chromium.org> 13 The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP. 23 enable-gpios: 27 suspend-gpios: 29 description: GPIO specifier for GPIO1 pin on bridge (active low). [all …]
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H A D | fsl,imx8qxp-ldb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX8qm/qxp LVDS Display Bridge 10 - Liu Ying <victor.liu@nxp.com> 13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels. 23 LDB split mode to support a dual link LVDS display. The channel indexes 41 - fsl,imx8qm-ldb 42 - fsl,imx8qxp-ldb [all …]
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H A D | toshiba,tc358767.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/toshiba,tc358767.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Toshiba TC358767/TC358867/TC9595 DSI/DPI/eDP bridge 10 - Andrey Gusakov <andrey.gusakov@cogentembedded.com> 13 The TC358767/TC358867/TC9595 is bridge device which 19 - items: 20 - enum: 21 - toshiba,tc358867 [all …]
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H A D | fsl,imx8qxp-pixel-link.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX8qm/qxp Display Pixel Link 10 - Liu Ying <victor.liu@nxp.com> 13 The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard 14 asynchronous linkage between pixel sources(display controller or 19 display controllers. 21 The i.MX8qm/qxp Display Pixel Link is accessed via System Controller Unit(SCU) [all …]
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H A D | simple-bridge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/simple-bridge.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Transparent non-programmable DRM bridges 10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 11 - Maxime Ripard <mripard@kernel.org> 14 This binding supports transparent non-programmable bridges that don't require 20 - items: 21 - enum: [all …]
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H A D | analogix,dp.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/analogix,dp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Analogix Display Port bridge 10 - Rob Herring <robh@kernel.org> 21 clock-names: true 25 phy-names: 28 force-hpd: 34 hpd-gpios: [all …]
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H A D | cdns,mhdp8546.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Cadence MHDP8546 bridge 10 - Swapnil Jakhade <sjakhade@cadence.com> 11 - Yuti Amonkar <yamonkar@cadence.com> 16 - cdns,mhdp8546 17 - ti,j721e-mhdp8546 22 - description: [all …]
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H A D | samsung,mipi-dsim.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung MIPI DSIM bridge controller 10 - Inki Dae <inki.dae@samsung.com> 11 - Jagan Teki <jagan@amarulasolutions.com> 12 - Marek Szyprowski <m.szyprowski@samsung.com> 15 Samsung MIPI DSIM bridge controller can be found it on Exynos 21 - enum: [all …]
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H A D | fsl,ldb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,ldb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX8MP DPI to LVDS bridge chip 10 - Marek Vasut <marex@denx.de> 14 for configuring the on-SoC DPI-to-LVDS serializer. This describes 15 those registers as bridge within the DT. 20 - fsl,imx6sx-ldb 21 - fsl,imx8mp-ldb [all …]
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H A D | toshiba,tc358762.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/toshiba,tc358762.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Toshiba TC358762 MIPI DSI to MIPI DPI bridge 10 - Marek Vasut <marex@denx.de> 13 The TC358762 is bridge device which converts MIPI DSI to MIPI DPI. 18 - toshiba,tc358762 24 reset-gpios: 27 vddc-supply: [all …]
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H A D | toshiba,tc358764.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/toshiba,tc358764.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Toshiba TC358764 MIPI-DSI to LVDS bridge 10 - Andrzej Hajda <andrzej.hajda@intel.com> 20 reset-gpios: 23 vddc-supply: 26 vddio-supply: 29 vddlvds-supply: [all …]
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H A D | chipone,icn6211.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/chipone,icn6211.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Chipone ICN6211 MIPI-DSI to RGB Converter bridge 10 - Jagan Teki <jagan@amarulasolutions.com> 13 ICN6211 is MIPI-DSI to RGB Converter bridge from chipone. 21 - chipone,icn6211 27 clock-names: 36 enable-gpios: [all …]
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H A D | google,cros-ec-anx7688.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/google,cros-ec-anx7688.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ChromeOS EC ANX7688 HDMI to DP Converter through Type-C Port 10 - Nicolas Boichat <drinkcat@chromium.org> 13 ChromeOS EC ANX7688 is a display bridge that converts HDMI 2.0 to 14 DisplayPort 1.3 Ultra-HDi (4096x2160p60). It is an Analogix ANX7688 chip 16 (See google,cros-ec.yaml). It is accessed using I2C tunneling through 18 (See google,cros-ec-i2c-tunnel.yaml). [all …]
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H A D | lontium,lt8912b.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridg [all...] |
H A D | nxp,ptn3460.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/nxp,ptn3460.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP PTN3460 eDP to LVDS bridge 10 - Sean Paul <seanpaul@chromium.org> 17 description: I2C address of the bridge 20 edid-emulation: 34 powerdown-gpios: 38 reset-gpios: [all …]
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H A D | fsl,imx8mp-hdmi-tx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8mp-hdmi-tx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lucas Stach <l.stach@pengutronix.de> 17 - $ref: /schemas/display/bridge/synopsys,dw-hdmi.yaml# 22 - fsl,imx8mp-hdmi-tx 24 reg-io-width: 30 clock-names: 32 - const: iahb [all …]
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/freebsd/sys/contrib/device-tree/Bindings/soc/imx/ |
H A D | fsl,imx8mm-disp-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MM DISP blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to 14 the NoC and ensuring proper power sequencing of the display and MIPI CSI 20 - const: fsl,imx8mm-disp-blk-ctrl 21 - const: syscon [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/panel/ |
H A D | raspberrypi,7inch-touchscreen.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/panel/raspberrypi,7inch-touchscreen.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Eric Anholt <eric@anholt.net> 11 - Thierry Reding <thierry.reding@gmail.com> 16 - TC358762 DSI->DPI bridge 17 - Atmel microcontroller on I2C for power sequencing the DSI bridge and 19 - Touchscreen controller on I2C for touch input 21 and this binding covers the DSI display parts but not its touch input. [all …]
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/freebsd/sys/net/ |
H A D | if_bridgevar.h | 4 * SPDX-License-Identifier: BSD-4-Clause 20 * must display the following acknowledgement: 53 * must display the following acknowledgement: 74 * Data structure and control definitions for bridge interfaces. 87 * bridge interface itself is keyed off the ifdrv structure. 89 #define BRDGADD 0 /* add bridge member (ifbreq) */ 90 #define BRDGDEL 1 /* delete bridge member (ifbreq) */ 113 #define BRDGADDS 23 /* add bridge span member (ifbreq) */ 114 #define BRDGDELS 24 /* delete bridge span member (ifbreq) */ 115 #define BRDGPARAM 25 /* get bridge STP params (ifbropreq) */ [all …]
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/freebsd/sbin/ifconfig/ |
H A D | ifconfig.8 | 1 .\"- 2 .\" SPDX-License-Identifier: BSD-3-Clause 93 .Bl -tag -width indent 95 Display information about all interfaces in the system. 107 Display only the interfaces that are down. 120 The format is specified as a comma-separated list of 141 .Bl -tag -width default 143 Adjust the display of inet and inet6 addresses: 145 .Bl -tag -width default -compact 158 Adjust the display of link-level ethernet (MAC) addresses: [all …]
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/freebsd/sys/dev/pci/ |
H A D | vga_pci.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 30 * Simple driver for PCI VGA display devices. Drivers such as agp(4) and 53 #include <compat/x86bios/x86bios.h> /* To re-POST the card. */ 75 int vga_pci_default_unit = -1; 77 &vga_pci_default_unit, -1, "Default VGA-compatible display"); 96 * The boot display device was determined by a previous in vga_pci_is_boot_display() 104 * The primary video card used as a boot display must have the in vga_pci_is_boot_display() 108 * Furthermore, if the card is attached to a bridge, instead of in vga_pci_is_boot_display() 109 * the root PCI bus, the bridge must have the "VGA Enable" bit in vga_pci_is_boot_display() [all …]
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