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/linux/drivers/misc/mei/
H A Dhw-me.c908 dev_dbg(dev->dev, "pg: not supported: d0i3 = %d HGP = %d hbm version %d.%d ?= %d.%d\n", in mei_me_pg_is_enabled()
920 * mei_me_d0i3_set - write d0i3 register bit on mei device.
943 * mei_me_d0i3_unset - clean d0i3 register bit on mei device.
962 * mei_me_d0i3_enter_sync - perform d0i3 entry procedure
976 /* we are in d0i3, nothing to do */ in mei_me_d0i3_enter_sync()
977 dev_dbg(dev->dev, "d0i3 set not needed\n"); in mei_me_d0i3_enter_sync()
1006 dev_dbg(dev->dev, "d0i3 enter wait not needed\n"); in mei_me_d0i3_enter_sync()
1014 dev->timeouts.d0i3); in mei_me_d0i3_enter_sync()
1030 dev_dbg(dev->dev, "d0i3 enter ret = %d\n", ret); in mei_me_d0i3_enter_sync()
1035 * mei_me_d0i3_enter - perform d0i3 entry procedure
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H A Dhw-me-regs.h157 /* H_D0I3C - D0I3 Control */
182 /* Host D0I3 Interrupt Enable */
184 /* Host D0I3 Interrupt Status */
H A Dmei_dev.h465 unsigned int d0i3; /* D0i3 set/unset max response time, in jiffies */ member
H A Dinit.c435 dev->timeouts.d0i3 = mei_secs_to_jiffies(MEI_D0I3_TIMEOUT); in mei_device_init()
H A Dpci-me.c266 * but the mei device cannot wake up from D3 unlike from D0i3. in mei_me_probe()
/linux/sound/soc/sof/intel/
H A Dhda-dsp.c42 "SOF HDA enable trace when the DSP is in D0I3 in S0");
514 /* Confirm d0i3 state changed with paranoia check */ in hda_dsp_update_d0i3c_register()
526 * d0i3 streaming is enabled if all the active streams can
527 * work in d0i3 state and playback is enabled
564 * 2. D0I0 -> D0I3 in hda_dsp_set_D0_state()
565 * 3. D0I3 -> D0I0 in hda_dsp_set_D0_state()
586 * D0I3 for S0Ix suspend, but it can be kept enabled in hda_dsp_set_D0_state()
587 * when the DSP enters D0I3 while the system is in S0 in hda_dsp_set_D0_state()
644 dev_dbg(sdev->dev, "Current DSP power state: D0I3\n"); in hda_dsp_state_log()
715 * When the DSP is already in D0I3 and the target state is D0I3, in hda_dsp_set_power_state_ipc3()
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H A Dhda.h81 #define SOF_HDA_VS_D0I3C_I3 BIT(2) /* D0i3 enable bit */
340 /* Delay before scheduling D0i3 entry */
478 * Time in ms for opportunistic D0I3 entry delay.
532 /* delayed work to enter D0I3 opportunistically */
H A Dcnl.c301 * D0I0 and D0I3 states. And these are sent only during the in cnl_ipc_send_msg()
303 * that a compact IPC results in the DSP exiting D0I3 without in cnl_ipc_send_msg()
H A Dhda-ipc.c95 /* Schedule a delayed work for d0i3 entry after sending non-pm ipc msg */ in hda_dsp_ipc4_schedule_d0i3_work()
H A Dhda.c52 * needs to remain in D0i3 so that the Master does not lose context
957 /* cancel any attempt for DSP D0I3 */ in hda_dsp_remove()
/linux/drivers/accel/ivpu/
H A Divpu_hw_btrs.c368 ivpu_err(vdev, "Failed to sync before D0i3 transition: %d\n", ret); in d0i3_drive_mtl()
381 ivpu_err(vdev, "Failed to sync after D0i3 transition: %d\n", ret); in d0i3_drive_mtl()
393 ivpu_err(vdev, "Failed to sync before D0i3 transition: %d\n", ret); in d0i3_drive_lnl()
406 ivpu_err(vdev, "Failed to sync after D0i3 transition: %d\n", ret); in d0i3_drive_lnl()
430 ivpu_err(vdev, "Failed to enable D0i3: %d\n", ret); in ivpu_hw_btrs_d0i3_enable()
446 ivpu_err(vdev, "Failed to disable D0i3: %d\n", ret); in ivpu_hw_btrs_d0i3_disable()
H A Dvpu_boot_api.h344 * D0i3 delayed entry
347 * 1: IPC message required to save state on D0i3 entry flow.
350 /* Time spent by VPU in D0i3 state */
352 /* Value of VPU perf counter at the time of entering D0i3 state . */
H A Divpu_pm.c307 ivpu_err(vdev, "Failed to prepare for d0i3: %d\n", ret_d0i3); in ivpu_pm_runtime_suspend_cb()
H A Dvpu_jsm_api.h547 * Perform the save procedure for the D0i3 entry
/linux/arch/x86/platform/atom/
H A Dpunit_atom_debug.c80 static const char * const dstates[] = {"D0", "D0i1", "D0i2", "D0i3"};
/linux/include/uapi/sound/
H A Dsnd_sst_tokens.h153 * %SKL_TKL_U32_D0I3_CAPS: Specifies the D0i3 capability for module
/linux/sound/soc/sof/
H A Dpcm.c373 * If DSP D0I3 is allowed during S0iX, set the suspend_ignored flag for in sof_pcm_trigger()
374 * D0I3-compatible streams to keep the firmware pipeline running in sof_pcm_trigger()
/linux/drivers/platform/x86/intel/telemetry/
H A Ddebugfs.c595 seq_puts(s, "D3/D0i3 Status\n"); in telem_soc_states_show()
597 seq_puts(s, "Block\t\t D3\t D0i3\n"); in telem_soc_states_show()
/linux/drivers/net/wireless/intel/iwlwifi/fw/
H A Dfile.h322 * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
371 * from AP and will send it upon d0i3 exit.
/linux/drivers/net/wireless/intel/iwlwifi/fw/api/
H A Dcommands.h543 * @D0I3_END_CMD: End D0i3/D3 state, no command data
H A Dd3.h12 * enum iwl_d0i3_flags - d0i3 flags
H A Drx.h983 * @mpdu_rx_count: the number of received MPDUs since entering D0i3
/linux/drivers/hid/intel-ish-hid/ipc/
H A Dpci-ish.c352 * the ISH would enter D0i3 in ish_suspend()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_hwseq.c959 * do not use MALL for displays that support PSR as they use D0i3.2 in DMCUB FW in dcn30_apply_idle_power_optimizations()
962 * a non-PSR display present, since in that case we can't do D0i3.2 in dcn30_apply_idle_power_optimizations()
/linux/drivers/net/wireless/intel/iwlwifi/mvm/
H A Dsta.c37 /* d0i3/d3 assumes the AP's sta_id (of sta vif) is 0. reserve it. */ in iwl_mvm_find_free_sta_id()