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/linux/drivers/base/
H A Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0
3 * cacheinfo support - processor cache information via sysfs
5 * Based on arch/x86/kernel/cpu/intel_cacheinfo.c
15 #include <linux/cpu.h>
24 /* pointer to per cpu cacheinfo */
26 #define ci_cacheinfo(cpu) (&per_cpu(ci_cpu_cacheinfo, cpu)) argument
27 #define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves) argument
28 #define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list) argument
29 #define per_cpu_cacheinfo_idx(cpu, idx) \ argument
30 (per_cpu_cacheinfo(cpu) + (idx))
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
36 debounce-interval = <0>;
[all …]
H A Dexynos5422-odroidhc1.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include "exynos5422-odroid-core.dtsi"
16 compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
19 led-controller {
20 compatible = "pwm-leds";
22 led-1 {
26 pwm-names = "pwm2";
27 max-brightness = <255>;
[all …]
/linux/drivers/bus/
H A Dmips_cdmm.c4 * Copyright (C) 2014-2015 Imagination Technologies Ltd.
13 #include <linux/cpu.h>
53 for (; table->type; ++table) { in mips_cdmm_lookup()
54 ret = (dev->type == table->type); in mips_cdmm_lookup()
67 return mips_cdmm_lookup(cdrv->id_table, cdev) != NULL; in mips_cdmm_match()
75 retval = add_uevent_var(env, "CDMM_CPU=%u", cdev->cpu); in mips_cdmm_uevent()
79 retval = add_uevent_var(env, "CDMM_TYPE=0x%02x", cdev->type); in mips_cdmm_uevent()
83 retval = add_uevent_var(env, "CDMM_REV=%u", cdev->rev); in mips_cdmm_uevent()
87 retval = add_uevent_var(env, "MODALIAS=mipscdmm:t%02X", cdev->type); in mips_cdmm_uevent()
102 CDMM_ATTR(cpu, "%u\n", dev->cpu);
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H A Darm-cci.c17 #include <linux/arm-cci.h>
49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA },
52 { .compatible = "arm,cci-500", },
53 { .compatible = "arm,cci-550", },
59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base),
60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base),
61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base),
62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base),
63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base),
67 #define DRIVER_NAME "ARM-CCI"
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/linux/tools/perf/util/bpf_skel/
H A Dkwork_top.bpf.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
40 __u32 type; member
47 __u32 cpu; member
51 __uint(type, BPF_MAP_TYPE_TASK_STORAGE);
58 __uint(type, BPF_MAP_TYPE_PERCPU_HASH);
65 __uint(type, BPF_MAP_TYPE_HASH);
72 __uint(type, BPF_MAP_TYPE_PERCPU_HASH);
79 __uint(type, BPF_MAP_TYPE_HASH);
92 static __always_inline int cpu_is_filtered(__u32 cpu) in cpu_is_filtered() argument
97 cpu_val = bpf_map_lookup_elem(&kwork_top_cpu_filter, &cpu); in cpu_is_filtered()
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H A Dkwork_trace.bpf.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
22 __u32 type; member
23 __u32 cpu; member
36 __uint(type, BPF_MAP_TYPE_HASH);
43 __uint(type, BPF_MAP_TYPE_HAS
95 __u32 cpu = bpf_get_smp_processor_id(); trace_event_match() local
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/linux/tools/perf/tests/
H A Dperf-record.c1 // SPDX-License-Identifier: GPL-2.0
20 int i, cpu = -1; in sched__get_first_possible_cpu() local
21 int nrcpus = cpu__max_cpu().cpu; in sched__get_first_possible_cpu()
27 if (sched_getaffinity(pid, size, maskp) == -1) { in sched__get_first_possible_cpu()
28 if (errno == EINVAL && nrcpus < (cpu__max_cpu().cpu << 8)) { in sched__get_first_possible_cpu()
33 return -1; in sched__get_first_possible_cpu()
38 if (cpu == -1) in sched__get_first_possible_cpu()
39 cpu = i; in sched__get_first_possible_cpu()
45 return cpu; in sched__get_first_possible_cpu()
57 int nrcpus = cpu__max_cpu().cpu; in test__PERF_RECORD()
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/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044-cpus.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #address-cells = <2>;
8 #size-cells = <2>;
11 #address-cells = <1>;
12 #size-cells = <0>;
13 timebase-frequency = <50000000>;
15 cpu0: cpu@0 {
18 i-cache-block-size = <64>;
19 i-cache-size = <65536>;
20 i-cache-sets = <512>;
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/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7-trip-points.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 cpu-alert-0 {
13 type = "passive";
15 cpu-alert-1 {
18 type = "passive";
20 cpu-alert-2 {
23 type = "passive";
25 cpu-alert-3 {
28 type = "passive";
30 cpu-alert-4 {
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/linux/Documentation/devicetree/bindings/powerpc/
H A Dibm,powerpc-cpu-features.txt3 (skiboot/doc/device-tree/ibm,powerpc-cpu-features/binding.txt)
9 ibm,powerpc-cpu-features binding
12 This device tree binding describes CPU features available to software, with
19 /cpus/ibm,powerpc-cpu-features node binding
20 -------------------------------------------
22 Node: ibm,powerpc-cpu-features
24 Description: Container of CPU feature nodes.
26 The node name must be "ibm,powerpc-cpu-features".
35 - compatible
37 Value type: string
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/linux/tools/bpf/bpftool/
H A Dmap_perf_ring.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
53 int cpu; member
58 print_bpf_output(void *private_data, int cpu, struct perf_event_header *event) in print_bpf_output() argument
67 int idx = ctx->all_cpus ? cpu : ctx->idx; in print_bpf_output()
71 jsonw_name(json_wtr, "type"); in print_bpf_output()
72 jsonw_uint(json_wtr, e->header.type); in print_bpf_output()
73 jsonw_name(json_wtr, "cpu"); in print_bpf_output()
74 jsonw_uint(json_wtr, cpu); in print_bpf_output()
77 if (e->header.type == PERF_RECORD_SAMPLE) { in print_bpf_output()
79 jsonw_uint(json_wtr, e->time); in print_bpf_output()
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/linux/arch/x86/events/intel/
H A Duncore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <asm/intel-family.h>
44 int die_id = -1; in uncore_pcibus_to_dieid()
48 if (map->segment == pci_domain_nr(bus)) { in uncore_pcibus_to_dieid()
49 die_id = map->pbus_to_dieid[bus->number]; in uncore_pcibus_to_dieid()
67 return bus ? pci_domain_nr(bus) : -EINVAL; in uncore_die_to_segment()
72 int node = pcibus_to_node(dev->bus); in uncore_device_to_die()
73 int cpu; in uncore_device_to_die() local
75 for_each_cpu(cpu, cpumask_of_pcibus(dev->bus)) { in uncore_device_to_die()
76 struct cpuinfo_x86 *c = &cpu_data(cpu); in uncore_device_to_die()
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/linux/Documentation/devicetree/bindings/csky/
H A Dcpus.txt2 C-SKY CPU Bindings
6 the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
7 defining properties for every cpu.
13 cpus and cpu node bindings definition
16 - cpus node
18 Description: Container of cpu nodes
24 - #address-cells
26 Value type: <u32>
28 - #size-cells
30 Value type: <u32>
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/linux/net/core/
H A Dgen_stats.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 gnet_stats_copy(struct gnet_dump *d, int type, void *buf, int size, int padattr) in gnet_stats_copy() argument
26 if (nla_put_64bit(d->skb, type, size, buf, padattr)) in gnet_stats_copy()
31 if (d->lock) in gnet_stats_copy()
32 spin_unlock_bh(d->lock); in gnet_stats_copy()
33 kfree(d->xstats); in gnet_stats_copy()
34 d->xstats = NULL; in gnet_stats_copy()
35 d->xstats_len = 0; in gnet_stats_copy()
36 return -1; in gnet_stats_copy()
40 * gnet_stats_start_copy_compat - start dumping procedure in compatibility mode
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/linux/tools/perf/arch/arm/util/
H A Dcs-etm.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/coresight-pmu.h>
18 #include "cs-etm.h"
29 #include "../../../util/cs-etm.h"
71 static bool cs_etm_is_ete(struct perf_pmu *cs_etm_pmu, struct perf_cpu cpu);
72 static int cs_etm_get_ro(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path, __u64 *val);
73 static bool cs_etm_pmu_path_exists(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path);
76 struct perf_cpu cpu) in cs_etm_get_version() argument
78 if (cs_etm_is_ete(cs_etm_pmu, cpu)) in cs_etm_get_version()
80 else if (cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0])) in cs_etm_get_version()
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/linux/arch/x86/kernel/acpi/
H A Dcstate.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * - Added _PDC for SMP C-states on Intel CPUs
12 #include <linux/cpu.h>
23 * Initialize bm_flags based on the CPU cache properties
25 * - When cache is not shared among all CPUs, we flush cache
27 * - When cache is shared among all CPUs, we use bm_check
33 unsigned int cpu) in acpi_processor_power_init_bm_check() argument
35 struct cpuinfo_x86 *c = &cpu_data(cpu); in acpi_processor_power_init_bm_check()
37 flags->bm_check = 0; in acpi_processor_power_init_bm_check()
39 flags->bm_check = 1; in acpi_processor_power_init_bm_check()
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/linux/Documentation/networking/dsa/
H A Dconfiguration.rst1 .. SPDX-License-Identifier: GPL-2.0
10 .. _dsa-config-showcases:
13 -----------------------
33 interface. The CPU port is the switch port connected to an Ethernet MAC chip.
42 - when a DSA user interface is brought up, the conduit interface is
44 - when the conduit interface is brought down, all DSA user interfaces are
71 * lan1: 192.0.2.1/30 (192.0.2.0 - 192.0.2.3)
72 * lan2: 192.0.2.5/30 (192.0.2.4 - 192.0.2.7)
73 * lan3: 192.0.2.9/30 (192.0.2.8 - 192.0.2.11)
76 * br0: 192.0.2.129/25 (192.0.2.128 - 192.0.2.255)
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/linux/arch/arm64/kernel/
H A Dcpufeature.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Contains CPU feature definitions
9 * there's a little bit of over-abstraction that tends to obscure what's going
14 * user-visible instructions are available only on a subset of the available
16 * boot CPU and comparing these with the feature registers of each secondary
17 * CPU when bringing them up. If there is a mismatch, then we update the
18 * snapshot state to indicate the lowest-common denominator of the feature,
27 * may prevent a CPU from being onlined at all.
31 * - Mismatched features are *always* sanitised to a "safe" value, which
34 * - A mismatched feature marked with FTR_STRICT will cause a "SANITY CHECK"
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H A Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0-only
35 enum cache_type type, unsigned int level) in ci_leaf_init() argument
37 this_leaf->level = level; in ci_leaf_init()
38 this_leaf->type = type; in ci_leaf_init()
48 level--; in detect_cache_level()
59 int early_cache_level(unsigned int cpu) in early_cache_level() argument
61 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); in early_cache_level()
63 detect_cache_level(&this_cpu_ci->num_levels, &this_cpu_ci->num_leaves); in early_cache_level()
68 int init_cache_level(unsigned int cpu) in init_cache_level() argument
72 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); in init_cache_level()
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/linux/arch/s390/kernel/
H A Dcache.c1 // SPDX-License-Identifier: GPL-2.0
3 * Extract CPU cache information and expose them via sysfs.
9 #include <linux/cpu.h>
43 unsigned char type : 2; member
74 for (idx = 0; idx < this_cpu_ci->num_leaves; idx++) { in show_cacheinfo()
75 cache = this_cpu_ci->info_list + idx; in show_cacheinfo()
76 seq_printf(m, "cache%-11d: ", idx); in show_cacheinfo()
77 seq_printf(m, "level=%d ", cache->level); in show_cacheinfo()
78 seq_printf(m, "type=%s ", cache_type_string[cache->type]); in show_cacheinfo()
80 cache->disable_sysfs ? "Shared" : "Private"); in show_cacheinfo()
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/linux/drivers/xen/events/
H A Devents_base.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * must dynamically map irqs<->event channels. The event channels
15 * 1. Inter-domain notifications. This includes all the virtual
16 * device events, since they're driven by front-ends in another domain
18 * 2. VIRQs, typically used for timers. These are per-cpu events.
20 * 4. PIRQs - Hardware interrupts.
59 #include <xen/xen-ops.h>
87 * type - enum xen_irq_type
88 * event channel - irq->event channel mapping
89 * cpu - cpu this event channel is bound to
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/linux/tools/testing/selftests/mm/
H A Duffd-stress.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * There are three threads running per CPU:
13 * 1) one per-CPU thread takes a per-page pthread_mutex in a random
15 * area_src), and increments a per-page counter in the same page,
18 * 2) another per-CPU thread handles the userfaults generated by
22 * 3) one last per-CPU thread transfers the memory in the background
24 * 2). Each cpu thread takes cares of transferring a portion of the
27 * When all threads of type 3 completed the transfer, one bounce is
32 * per-CPU threads 1 by triggering userfaults inside
37 #include "uffd-common.h"
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/linux/drivers/soc/rockchip/
H A Ddtpm.c1 // SPDX-License-Identifier: GPL-2.0-only
16 .type = DTPM_NODE_VIRTUAL },
18 .type = DTPM_NODE_VIRTUAL,
20 [2] = { .name = "/cpus/cpu@0",
21 .type = DTPM_NODE_DT,
23 [3] = { .name = "/cpus/cpu@1",
24 .type = DTPM_NODE_DT,
26 [4] = { .name = "/cpus/cpu@2",
27 .type = DTPM_NODE_DT,
29 [5] = { .name = "/cpus/cpu@3",
[all …]
/linux/samples/bpf/
H A Dtracex6_user.c1 // SPDX-License-Identifier: GPL-2.0
18 #include "perf-sys.h"
25 static void check_on_cpu(int cpu, struct perf_event_attr *attr) in check_on_cpu() argument
32 /* Move to target CPU */ in check_on_cpu()
34 CPU_SET(cpu, &set); in check_on_cpu()
37 pmu_fd = sys_perf_event_open(attr, -1/*pid*/, cpu/*cpu*/, -1/*group_fd*/, 0); in check_on_cpu()
39 fprintf(stderr, "sys_perf_event_open failed on CPU %d\n", cpu); in check_on_cpu()
43 assert(bpf_map_update_elem(map_fd[0], &cpu, &pmu_fd, BPF_ANY) == 0); in check_on_cpu()
46 bpf_map_get_next_key(map_fd[1], &cpu, NULL); in check_on_cpu()
48 if (bpf_map_lookup_elem(map_fd[1], &cpu, &value)) { in check_on_cpu()
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