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/freebsd/contrib/wpa/wpa_supplicant/
H A Dop_classes.c6 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
20 static enum chan_allowed allow_channel(struct hostapd_hw_modes *mode, in allow_channel() argument
27 for (i = 0; i < mode->num_channels; i++) { in allow_channel()
30 chan_is_6ghz = is_6ghz_freq(mode->channels[i].freq); in allow_channel()
31 if (is_6ghz == chan_is_6ghz && mode->channels[i].chan == chan) in allow_channel()
35 if (i == mode->num_channels || in allow_channel()
36 (mode->channels[i].flag & HOSTAPD_CHAN_DISABLED)) in allow_channel()
40 *flags = mode->channels[i].flag; in allow_channel()
42 if (mode->channels[i].flag & HOSTAPD_CHAN_NO_IR) in allow_channel()
49 static int get_center_80mhz(struct hostapd_hw_modes *mode, u8 channel, in get_center_80mhz() argument
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H A Drrm.c2 * wpa_supplicant - Radio Measurements
3 * Copyright (c) 2003-2016, Jouni Malinen <j@w1.fi>
25 if (!rrm->notify_neighbor_rep) { in wpas_rrm_neighbor_rep_timeout_handler()
31 wpa_printf(MSG_DEBUG, "RRM: Notifying neighbor report - NONE"); in wpas_rrm_neighbor_rep_timeout_handler()
32 rrm->notify_neighbor_rep(rrm->neighbor_rep_cb_ctx, NULL); in wpas_rrm_neighbor_rep_timeout_handler()
34 rrm->notify_neighbor_rep = NULL; in wpas_rrm_neighbor_rep_timeout_handler()
35 rrm->neighbor_rep_cb_ctx = NULL; in wpas_rrm_neighbor_rep_timeout_handler()
40 * wpas_rrm_reset - Clear and reset all RRM data in wpa_supplicant
45 wpa_s->rrm.rrm_used = 0; in wpas_rrm_reset()
47 eloop_cancel_timeout(wpas_rrm_neighbor_rep_timeout_handler, &wpa_s->rrm, in wpas_rrm_reset()
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/freebsd/crypto/krb5/src/lib/crypto/builtin/des/
H A Df_cbc.c1 /* -*- mode: c; c-basic-offset: 4; indent-tabs-mode: nil -*- */
33 * des_cbc_encrypt.c - an implementation of the DES cipher function in cbc mode
39 * des_cbc_encrypt - {en,de}crypt a stream in CBC mode
43 * This routine performs DES cipher-block-chaining operation, either
50 * NOTE-- the output is ALWAYS an multiple of 8 bytes long. If not
61 const mit_des_cblock mit_des_zeroblock /* = all zero */;
64 des_cbc_encrypt(const mit_des_cblock *in, mit_des_cblock *out, in des_cbc_encrypt()
65 unsigned long length, const mit_des_key_schedule schedule, in des_cbc_encrypt()
66 const mit_des_cblock ivec) in des_cbc_encrypt()
69 const unsigned DES_INT32 *kp; in des_cbc_encrypt()
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H A Df_cksum.c1 /* -*- mode: c; c-basic-offset: 4; indent-tabs-mode: nil -*- */
30 * des_cbc_cksum.c - compute an 8 byte checksum using DES in CBC mode
39 * This routine performs DES cipher-block-chaining checksum operation,
46 * NOTE-- the output is ALWAYS 8 bytes long. If not enough space was
54 mit_des_cbc_cksum(const krb5_octet *in, krb5_octet *out, in mit_des_cbc_cksum()
55 unsigned long length, const mit_des_key_schedule schedule, in mit_des_cbc_cksum()
56 const krb5_octet *ivec) in mit_des_cbc_cksum()
59 const unsigned DES_INT32 *kp; in mit_des_cbc_cksum()
60 const unsigned char *ip; in mit_des_cbc_cksum()
61 unsigned char *op; in mit_des_cbc_cksum() local
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DVarLenCodeEmitterGen.cpp1 //===- VarLenCodeEmitterGen.cpp - CEG for variable-length insts -----------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // The CodeEmitterGen component for variable-length instructions.
11 // The basic CodeEmitterGen is almost exclusively designed for fixed-
30 // encoding for variable-length instructions.
50 //===----------------------------------------------------------------------===//
74 // Mode identifier when only one encoding is defined.
75 const AltEncodingTy Universal = -1;
85 ArrayRef<const CodeGenInstruction *> NumberedInstructions,
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/freebsd/usr.sbin/cxgbetool/
H A Dcxgbetool.c1 /*-
61 const char *progname, *nexus;
72 const char *name;
78 const char *name;
79 const struct reg_info *ri;
83 const char *name; /* Field name */
88 unsigned char islog2; /* Field contains the base-2 log of the value */
110 "\tfilter mode [<match>] ... get/set global filter mode\n" in usage()
114 "\thashfilter mode [<matc in usage()
529 do_show_info_header(uint32_t mode) do_show_info_header() argument
792 do_show_one_filter_info(struct t4_filter * t,uint32_t mode) do_show_one_filter_info() argument
922 uint32_t mode = 0, header, hpfilter = 0; show_filters() local
976 uint32_t mode = hashfilter; get_filter_mode() local
1029 uint32_t mode = 0; set_filter_mode() local
2760 struct t4_sched_params op; sched_class() local
2987 struct t4_sched_queue op = {0}; sched_queue() local
3347 free_offload_policy(struct t4_offload_policy * op) free_offload_policy() argument
3369 parse_offload_policy(const char * fname,struct t4_offload_policy * op) parse_offload_policy() argument
3455 struct t4_offload_policy op = {0}; load_offload_policy() local
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/freebsd/sys/contrib/device-tree/Bindings/input/
H A Ddlg,da7280.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Dialog Semiconductor DA7280 Low Power High-Definition Haptic Driver
10 - Roy Im <roy.im.opensource@diasemi.com>
14 const: dlg,da7280
23 dlg,actuator-type:
25 - LRA # Linear Resonance Actuator type
26 - ERM-bar # Bar type Eccentric Rotating Mass
27 - ERM-coin # Coin type Eccentric Rotating Mass
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H A Ddlg,da7280.txt4 - compatible: Should be "dlg,da7280".
5 - reg: Specifies the I2C slave address.
7 - interrupt-parent : Specifies the phandle of the interrupt controller to
10 - dlg,actuator-type: Set Actuator type. it should be one of:
11 "LRA" - Linear Resonance Actuator type.
12 "ERM-bar" - Bar type Eccentric Rotating Mass.
13 "ERM-coin" - Coin type Eccentric Rotating Mass.
15 - dlg,const-op-mode: Haptic operation mode for FF_CONSTANT.
17 1 - Direct register override(DRO) mode triggered by i2c(default),
18 2 - PWM data source mode controlled by PWM duty,
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h1 //===- ARMISelLowering.h - ARM DAG Lowering Interface -----------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
60 Wrapper, // Wrapper - A wrapper node for TargetConstantPool,
62 WrapperPIC, // WrapperPIC - A wrapper node for TargetGlobalAddress in
63 // PIC mode.
64 WrapperJT, // WrapperJT - A wrapper node for TargetJumpTable
66 // Add pseudo op to model memcpy for struct byval.
71 CALL_NOLINK, // Function call with branch not branch-and-link.
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/freebsd/sys/contrib/zlib/
H A Dinffast.c1 /* inffast.c -- fast decoding
2 * Copyright (C) 1995-2017 Mark Adler
12 # pragma message("Assembler code may have bugs -- use at your own risk")
18 available, an end-of-block is encountered, or a data error is encountered.
25 state->mode == LEN
26 strm->avail_in >= 6
27 strm->avail_out >= 258
28 start >= strm->avail_out
29 state->bits < 8
31 On return, state->mode is one of:
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H A Dinfback.c1 /* infback.c -- inflate using a call-back interface
2 * Copyright (C) 1995-2022 Mark Adler
8 inflate.o would be linked into an application--not both. The interface
9 with inffast.c is retained so that optimized assembler-coded versions of
22 windowBits is in the range 8..15, and window is a user-supplied
26 unsigned char FAR *window, const char *version, in inflateBackInit_()
36 strm->msg = Z_NULL; /* in case we return an error */ in inflateBackInit_()
37 if (strm->zalloc == (alloc_func)0) { in inflateBackInit_()
41 strm->zalloc = zcalloc; in inflateBackInit_()
42 strm->opaque = (voidpf)0; in inflateBackInit_()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h1 //==-- AArch64ISelLowering.h - AArch64 DAG Lowering Interface ----*- C++ -*-==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
35 // to source operand OP<n>.
52 WrapperLarge, // 4-instruction MOVZ/MOVK sequence for 64-bit addresses.
185 // Scalar-to-vector duplication
268 // Vector across-lanes addition
287 // Vector across-lanes min/max
304 // Compare-and-branch
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/freebsd/lib/libc/gen/
H A Dsetmode.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
51 #include "un-namespace.h"
77 * Given the old mode and an array of bitcmd structures, apply the operations
78 * described in the bitcmd structures to the old mode, and return the new mode.
79 * Note that there is no '=' command; a strict assignment is just a '-' (clear
83 getmode(const void *bbox, mode_t omode) in getmode()
85 const BITCMD *set; in getmode()
88 set = (const BITCMD *)bbox; in getmode()
91 switch(set->cmd) { in getmode()
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/freebsd/contrib/libedit/
H A Deditline.33 .\" Copyright (c) 1997-2014 The NetBSD Foundation, Inc.
81 .Fn el_init "const char *prog" "FILE *fin" "FILE *fout" "FILE *ferr"
83 .Fn el_init_fd "const char *prog" "FILE *fin" "FILE *fout" "FILE *ferr" "int fdin" "int fdout" "int…
97 .Fn el_push "EditLine *e" "const char *mbs"
99 .Fn el_wpush "EditLine *e" "const wchar_t *wcs"
101 .Fn el_parse "EditLine *e" "int argc" "const char *argv[]"
103 .Fn el_wparse "EditLine *e" "int argc" "const wchar_t *argv[]"
105 .Fn el_set "EditLine *e" "int op" "..."
107 .Fn el_wset "EditLine *e" "int op" "..."
109 .Fn el_get "EditLine *e" "int op" "..."
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h1 //===-- RISCVISelLowering.h - RISC-V DAG Lowering Interface -----*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file defines the interfaces that RISC-V uses to lower LLVM code into a
12 //===----------------------------------------------------------------------===//
30 // clang-format off
37 /// Select with condition operator - This selects between a true value and
40 /// condition code in op #2, a XLenVT constant from the ISD::CondCode enum.
57 // Selected as PseudoAddTPRel. Used to emit a TP-relative relocation.
68 // RV64I shifts, directly matching the semantics of the named RISC-V
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMemoryLegalizer.cpp1 //===- SIMemoryLegalizer.cpp ----------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// Memory legalizer - implements memory model. More information can be
12 /// http://llvm.org/docs/AMDGPUUsage.html#memory-model
14 //===----------------------------------------------------------------------===//
32 #define DEBUG_TYPE "si-memory-legalizer"
36 "amdgcn-skip-cache-invalidations", cl::init(false), cl::Hidden,
139 this->IsCrossAddressSpaceOrdering = false; in SIMemOpInfo()
145 this->Scope = std::min(Scope, SIAtomicScope::SINGLETHREAD); in SIMemOpInfo()
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/freebsd/sys/contrib/zstd/lib/compress/
H A Dzstd_compress_superblock.c5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
11 /*-*************************************
23 * Compresses literals section for a sub-block.
32 * hufMetadata->hType has literals block type info.
33 * If it is set_basic, all sub-blocks literals section will be Raw_Literals_Block.
34 * If it is set_rle, all sub-blocks literals section will be RLE_Literals_Block.
35 …* If it is set_compressed, first sub-block's literals section will be Compressed_Literals_Blo…
36 * If it is set_compressed, first sub-block's literals section will be Treeless_Literals_Block
37 * and the following sub-blocks' literals sections will be Treeless_Literals_Block.
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H A Dzstd_compress.c5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
11 /*-*************************************
46 * Maximum size of the hash table dedicated to find 3-bytes matches,
57 /*-*************************************
62 * full-block strategy.
63 * When there are a lot of small blocks due to frequent flush in streaming mode
72 /*-*************************************
76 const void* dictContent;
87 … * row-based matchfinder. Unless the cdict is reloaded, we will use
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h1 //===-- PPCISelLowering.h - PPC32 DAG Lowering Interface --------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
51 /// FSEL - Traditional three-operand fsel node.
55 /// XSMAXC[DQ]P, XSMINC[DQ]P - C-type min/max instructions.
59 /// FCFID - The FCFID instruction, taking an f64 operand and producing
64 /// Newer FCFID[US] integer-to-floating-point conversion instructions for
65 /// unsigned integers and single-precision outputs.
70 /// FCTI[D,W]Z - The FCTIDZ and FCTIWZ instructions, taking an f32 or f64
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanSLP.cpp1 //===- VPlanSLP.cpp - SLP Analysis based on VPlan -------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 /// Look-ahead SLP: auto-vectorization in the presence of commutative
15 //===----------------------------------------------------------------------===//
37 #define DEBUG_TYPE "vplan-slp"
39 // Number of levels to look ahead when re-ordering multi node operands.
51 return cast<VPInstruction>(V)->getUnderlyingInstr(); in addCombined()
55 Type *T = cast<VPInstruction>(V)->getUnderlyingInstr()->getType(); in addCombined()
56 assert(!T->isVectorTy() && "Only scalar types supported for now"); in addCombined()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h1 //===-- X86ISelLowering.h - X86 DAG Lowering Interface ----------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
62 /// #0 - The incoming token chain
63 /// #1 - The callee
64 /// #2 - The number of arg bytes the caller pushes on the stack.
65 /// #3 - The number of arg bytes the callee pops off the stack.
66 /// #4 - The value to pass in AL/AX/EAX (optional)
67 /// #5 - The value to pass in DL/DX/EDX (optional)
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/freebsd/usr.sbin/bsnmpd/modules/snmp_wlan/
H A Dwlan_sys.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
62 static int sock = -1;
65 static int wlan_kmod_load(const char *);
88 const struct ieee80211req_scan_result *, uint8_t *);
90 const struct ieee80211req_maclist *);
91 static struct wlan_peer *wlan_add_peerinfo(const struct ieee80211req_sta_info *);
98 return (-1); in wlan_ioctl_init()
113 static const char *wmod_names[] = {
121 wlan_kmod_load(const char *modname) in wlan_kmod_load()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.h1 //===- MipsISelLowering.h - Mips DAG Lowering Interface ---------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
65 // Get the Highest (63-48) 16 bits from a 64-bit immediate
68 // Get the Higher (47-32) 16 bits from a 64-bit immediate
71 // Get the High 16 bits from a 32/64-bit immediate
75 // Get the Lower 16 bits from a 32/64-bit immediate
82 // Get the High 16 bits from a 32-bit immediate for accessing TLS.
113 // FP-to-int truncation node.
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVECustomDAG.h1 //===------------ VECustomDAG.h - VE Custom DAG Nodes -----------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
36 bool isMaskArithmetic(SDValue Op);
44 bool maySafelyIgnoreMask(SDValue Op);
46 /// The VE backend uses a two-staged process to lower and legalize vector
62 // legalized since each element occupies a 64bit chunk - there is no
69 // demands - that is, the wrapped AVL is the correct setting for the VL
95 std::optional<EVT> getIdiomaticVectorType(SDNode *Op);
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.h1 //===-- NVPTXISelLowering.h - NVPTX DAG Lowering Interface ------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
448 //===--------------------------------------------------------------------===//
450 //===--------------------------------------------------------------------===//
453 explicit NVPTXTargetLowering(const NVPTXTargetMachine &TM,
454 const NVPTXSubtarget &STI);
455 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
457 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
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