| /freebsd/sys/contrib/device-tree/Bindings/input/ |
| H A D | iqs269a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jef
[all...] |
| H A D | azoteq,iqs7222.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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| /freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | adi,ad4130.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Cosmin Tanislav <cosmin.tanislav@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf
20 - adi,ad4130
29 clock-names:
31 - const: mclk
36 interrupt-names:
42 - int
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| H A D | adi,ad7124.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Stefan Popa <stefan.popa@analog.com>
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-8.pdf
21 - adi,ad7124-4
22 - adi,ad7124-8
25 description: SPI chip select number for the device
32 clock-names:
34 - const: mclk
[all …]
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| H A D | qcom,spmi-vadc.txt | 3 - SPMI PMIC voltage ADC (VADC) provides interface to clients to read
4 voltage. The VADC is a 15-bit sigma-delta ADC.
5 - SPMI PMIC5 voltage ADC (ADC) provides interface to clients to read
6 voltage. The VADC is a 16-bit sigma-delta ADC.
10 - compatible:
13 Definition: Should contain "qcom,spmi-vadc".
14 Should contain "qcom,spmi-adc5" for PMIC5 ADC driver.
15 Should contain "qcom,spmi-adc-rev2" for PMIC rev2 ADC driver.
16 Should contain "qcom,pms405-adc" for PMS405 PMIC
18 - reg:
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| H A D | adi,max11410.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ibrahim Tilki <Ibrahim.Tilki@analog.com>
21 - adi,max11410
30 interrupt-names:
34 - enum: [gpio0, gpio1]
35 - const: gpio1
37 '#address-cells':
40 '#size-cells':
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| /freebsd/sys/powerpc/powermac/ |
| H A D | dbdmavar.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
46 uint32_t address; /* 32-bit system physical address */
49 uint16_t xferStatus; /* Contents of channel status after completion */
71 0x000 Channel Control 4
72 0x004 Channel Status 4
74 0x010 Interrupt Select 4
75 0x014 Branch Select 4
76 0x018 Wait Select 4
87 /* Channel control is the write channel to channel status, the upper 16 bits
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| /freebsd/share/misc/ |
| H A D | usb_hid_usages | 4 # - lines that do not start with a white space give the number and name of
6 # - lines that start with a white space give the number and name of
20 0x08 Multi-axis Controller
36 0x3E Select
55 0x89 System Menu Select
62 0x90 D-pad Up
63 0x91 D-pad Down
64 0x92 D-pad Right
65 0x93 D-pad Left
107 0xB2 Anti-Torque Control
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| /freebsd/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | st,stm32-fmc2-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
15 - st,stm32mp15-fmc2
16 - st,stm32mp1-fmc2-nfc
27 - description: tx DMA channel
28 - description: rx DMA channel
29 - description: ecc DMA channel
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| /freebsd/contrib/ntp/include/ |
| H A D | icom.h | 10 #define P_TRACE 0x2 /* trace CI-V messges */
42 * CI-V frame codes
52 * CI-V controller commands
61 #define V_SVFO 0x07 /* select vfo */
62 #define V_SMEM 0x08 /* select channel/bank */
63 #define V_WRITE 0x09 /* write channel */
64 #define V_VFOM 0x0a /* memory -> vfo */
65 #define V_CLEAR 0x0b /* clear channel */
72 #define V_SANT 0x12 /* select antenna */
80 #define V_SETW 0x1a /* read/write channel/bank data */
|
| /freebsd/sys/dev/ic/ |
| H A D | cd1400.h | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * cyclades cyclom-y serial driver
45 #define CD1400_CAR 0x68 /* channel access */
46 #define CD1400_CAR_CHAN (3<<0) /* channel select */
48 #define CD1400_GCR_PARALLEL (1<<7) /* channel 0 is parallel */
53 #define CD1400_RICR 0x44 /* receive interrupting channel */
54 #define CD1400_TICR 0x45 /* transmit interrupting channel */
55 #define CD1400_MICR 0x46 /* modem interrupting channel */
59 #define CD1400_RIR_CHAN (3<<0) /* channel select */
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| /freebsd/sys/arm/freescale/vybrid/ |
| H A D | vf_adc.c | 1 /*-
28 * Vybrid Family 12-bit Analog to Digital Converter (ADC)
56 #define HC_ADCH_M 0x1f /* Input Channel Select Mask */
57 #define HC_ADCH_S 0 /* Input Channel Select Shift */
65 #define CFG_AVGS_M 0x3 /* Hardware Average select Mask */
66 #define CFG_AVGS_S 14 /* Hardware Average select Shift */
67 #define CFG_ADTRG (1 << 13) /* Conversion Trigger Select */
68 #define CFG_REFSEL_M 0x3 /* Voltage Reference Select Mask */
69 #define CFG_REFSEL_S 11 /* Voltage Reference Select Shift */
73 #define CFG_ADLPC (1 << 7) /* Low-Power Configuration */
[all …]
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| /freebsd/share/man/man4/ |
| H A D | snd_hdsp.4 | 35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
57 .Bl -bullet -compact
59 RME HDSP 9632 (optional AO4S-192 and AIS-192 extension boards)
67 For ADAT ports, 8 channel, 4 channel and 2 channel formats are supported.
69 (32kHz-48kHz) and 4 channels at double speed (64kHz-96kHz).
70 Only the HDSP 9632 can operate at quad speed (128kHz-192kHz), ADAT is
72 Depending on sample rate and channel format selected, not all pcm channels can
79 .Bl -tag -width indent
82 When opened in multi-channel audio software, this makes all ports available
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| /freebsd/sys/contrib/device-tree/Bindings/hwmon/ |
| H A D | max6697.txt | 4 - compatible:
16 - reg: I2C address
20 - smbus-timeout-disable
23 - extended-range-enable
26 - beta-compensation-enable
28 remote temperature channel 1.
30 - alert-mask
32 Select bit 0 for local temperature, bit 1..7 for remote temperatures.
34 - over-temperature-mask
35 Over-temperature bit mask. Over-temperature reporting disabled for
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| /freebsd/sys/net/ |
| H A D | sff8436.h | 1 /*-
29 * The following set of constants are from Document SFF-8436
34 * 1) 256-byte addressable block and 128-byte pages
35 * 2) Lower 128-bytes addresses always refer to the same page
37 * "page select" byte value.
44 * 0-127 Monitoring data & page select byte
45 * 128-255:
48 * 128-191 Base ID Fields
49 * 191-223 Extended ID
50 * 223-255 Vendor Specific ID
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| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-sprd-adi.txt | 3 ADI is the abbreviation of Anolog-Digital interface, which is used to access
12 which means we can just link one analog chip address to one hardware channel,
13 then users can access the mapped analog chip address by this hardware channel
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
17 channels, the first value specifies the hardware channel id which is used to
21 Since we have multi-subsystems will use unique ADI to access analog chip, when
34 - compatible: Should be "sprd,sc9860-adi".
35 - reg: Offset and length of ADI-SPI controller register space.
36 - #address-cells: Number of cells required to define a chip select address
37 on the ADI-SPI bus. Should be set to 1.
[all …]
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| H A D | qcom,spi-qup.txt | 4 and an input FIFO) for serial peripheral interface (SPI) mini-core.
10 - compatible: Should contain:
11 "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064.
12 "qcom,spi-qup-v2.1.1" for 8974 and later
13 "qcom,spi-qup-v2.2.1" for 8974 v2 and later.
15 - reg: Should contain base register location and length
16 - interrupts: Interrupt number used by this controller
18 - clocks: Should contain the core clock and the AHB clock.
19 - clock-names: Should be "core" for the core clock and "iface" for the
22 - #address-cells: Number of cells required to define a chip select
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mailbox/ |
| H A D | arm,mhuv2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tushar Khandelwal <tushar.khandelwal@arm.com>
11 - Viresh Kumar <viresh.kumar@linaro.org>
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
16 communication with remote processor(s), where the number of channel windows
33 - Data-transfer: Each transfer is made of one or more words, using one or more
34 channel windows.
36 - Doorbell: Each transfer is made up of single bit flag, using any one of the
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/iio/frequency/ |
| H A D | adf4350.txt | 4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
21 - adi,reference-div2-enable: Enables reference divider.
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | tlv320adcx140.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analo
[all...] |
| H A D | wm8731.txt | 8 - compatible : "wlf,wm8731"
10 - reg : the I2C address of the device for I2C, the chip select
20 Available audio endpoints for an audio-routing table:
21 * LOUT: Left Channel Line Output
22 * ROUT: Right Channel Line Output
23 * LHPOUT: Left Channel Headphone Output
24 * RHPOUT: Right Channel Headphone Output
25 * LLINEIN: Left Channel Line Input
26 * RLINEIN: Right Channel Line Input
|
| /freebsd/sys/contrib/device-tree/Bindings/iio/multiplexer/ |
| H A D | io-channel-mux.txt | 1 I/O channel multiplexer bindings
3 If a multiplexer is used to select which hardware signal is fed to
4 e.g. an ADC channel, these bindings describe that situation.
7 - compatible : "io-channel-mux"
8 - io-channels : Channel node of the parent channel that has multiplexed
10 - io-channel-names : Should be "parent".
11 - #address-cells = <1>;
12 - #size-cells = <0>;
13 - mux-controls : Mux controller node to use for operating the mux
14 - channels : List of strings, labeling the mux controller states.
[all …]
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| /freebsd/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300_radio.c | 28 0x101479e, /* Freq 2412 - (128 << 17) + 83870 */
29 0x101d027, /* Freq 2417 - (128 << 17) + 118823 */
30 0x10258af, /* Freq 2422 - (129 << 17) + 22703 */
31 0x102e138, /* Freq 2427 - (129 << 17) + 57656 */
32 0x10369c0, /* Freq 2432 - (129 << 17) + 92608 */
33 0x103f249, /* Freq 2437 - (129 << 17) + 127561 */
34 0x1047ad1, /* Freq 2442 - (130 << 17) + 31441 */
35 0x105035a, /* Freq 2447 - (130 << 17) + 66394 */
36 0x1058be2, /* Freq 2452 - (130 << 17) + 101346 */
37 0x106146b, /* Freq 2457 - (131 << 17) + 5227 */
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| /freebsd/sys/dev/sound/pci/ |
| H A D | envy24.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
29 /* -------------------------------------------------------------------- */
40 #define PCIR_MT 0x1c /* Professional Multi-Track I/O Base Address */
44 #define PCIM_LAC_SBDMA0 0x0000 /* SB DMA Channel Select: 0 */
45 #define PCIM_LAC_SBDMA1 0x0040 /* SB DMA Channel Select: 1 */
46 #define PCIM_LAC_SBDMA3 0x00c0 /* SB DMA Channel Select: 3 */
48 #define PCIM_LAC_MPU401 0x0008 /* MPU-401 I/O enable */
60 #define PCIM_LCC_MPUBASE 0x0006 /* MPU-401 base 300h-330h */
68 #define PCIM_SCFG_MPU 0x20 /* 1(0)/2(1) MPU-401 UART(s) */
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| /freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/ |
| H A D | uncore-memory.json | 70 "BriefDescription": "Pre-charges due to page misses",
79 "BriefDescription": "Pre-charge for reads",
93 …channel due to a write request to the iMC (Memory Controller). Activate commands are issued to op…
103 …ublicDescription": "Counts all CAS (Column Address Select) commands issued to DRAM per memory chan…
113 …ublicDescription": "Counts CAS (Column Access Select) regular read commands issued to DRAM on a pe…
123 …ion": "Counts CAS (Column Access Select) underfill read commands issued to DRAM due to a partial w…
128 … "DRAM CAS (Column Address Strobe) Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Write Major M…
133 …nts the total number or DRAM Write CAS commands issued on this channel while in Write-Major-Mode.",
143 …command has been issued to DRAM. This event counts both Isochronous and non-Isochronous requests …
|