Home
last modified time | relevance | path

Searched +full:ccn +full:- +full:504 (Results 1 – 4 of 4) sorted by relevance

/linux/Documentation/devicetree/bindings/perf/
H A Darm,ccn.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/perf/arm,ccn.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM CCN (Cache Coherent Network) Performance Monitors
10 - Robin Murphy <robin.murphy@arm.com>
15 - arm,ccn-502
16 - arm,ccn-504
17 - arm,ccn-508
18 - arm,ccn-512
[all …]
/linux/Documentation/admin-guide/perf/
H A Darm-ccn.rst5 CCN-504 is a ring-bus interconnect consisting of 11 crosspoints
11 -----------------
13 The CCN driver registers a perf PMU driver, which provides
15 in sysfs, see /sys/bus/event_source/devices/ccn*.
29 Crosspoint watchpoint-based events (special "event" value 0xfe)
44 the CCN PMU events. It is recommended that the user space tools
45 request the events on this processor (if not, the perf_event->cpu value
51 / # perf list | grep ccn
52 ccn/cycles/ [Kernel PMU event]
54 ccn/xp_valid_flit,xp=?,port=?,vc=?,dir=?/ [Kernel PMU event]
[all …]
/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-soc.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 interrupt-parent = <&gic0>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 /include/ "amd-seattle-clks.dtsi"
16 gic0: interrupt-controller@e1101000 {
17 compatible = "arm,gic-400", "arm,cortex-a15-gic";
18 interrupt-controller;
19 #interrupt-cells = <3>;
20 #address-cells = <2>;
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls208xa.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
[all …]