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/freebsd/sys/compat/linuxkpi/common/include/linux/
H A Dbitops.h1 /*-
5 * Copyright (c) 2013-2017 Mellanox Technologies, Ltd.
38 #define BIT(nr) (1UL << (nr)) macro
44 #define BITMAP_LAST_WORD_MASK(n) (~0UL >> (BITS_PER_LONG - (n)))
46 #define BIT_MASK(nr) (1UL << ((nr) & (BITS_PER_LONG - 1)))
48 #define GENMASK(h, l) (((~0UL) >> (BITS_PER_LONG - (h) - 1)) & ((~0UL) << (l)))
49 #define GENMASK_ULL(h, l) (((~0ULL) >> (BITS_PER_LONG_LONG - (h) - 1)) & ((~0ULL) << (l)))
66 __ffs(int mask) in __ffs() argument
68 return (ffs(mask) - 1); in __ffs()
72 __fls(int mask) in __fls() argument
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/freebsd/contrib/llvm-project/lldb/include/lldb/Utility/
H A DFlags.h1 //===-- Flags.h -------------------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
24 /// The value type for flags is a 32 bit unsigned integer type.
27 /// Construct with initial flag bit values.
29 /// Constructs this object with \a mask as the initial value for all of the
56 /// \param[in] mask
60 /// The new flags after clearing all bits from \a mask.
61 ValueType Clear(ValueType mask = ~static_cast<ValueType>(0)) {
62 m_flags &= ~mask;
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/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dregister-bit-led.txt1 Device Tree Bindings for Register Bit LEDs
3 Register bit leds are used with syscon multifunctional devices
5 single LED. The register bit LEDs appear as children to the
10 Each LED is represented as a sub-node of the syscon device. Each
13 LED sub-node properties:
16 - compatible : must be "register-bit-led"
17 - offset : register offset to the register controlling this LED
18 - mask : bit mask for the bit controlling this LED in the register
22 - label : (optional)
24 - linux,default-trigger : (optional)
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H A Dregister-bit-led.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/register-bi
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/freebsd/sys/contrib/device-tree/src/mips/mti/
H A Dsead3.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 compatible = "mti,sead-3";
14 model = "MIPS SEAD-3";
17 stdout-path = "serial1:115200";
36 cpu_intc: interrupt-controller {
37 compatible = "mti,cpu-interrupt-controller";
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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_reg_utils.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
53 /* *INDENT-OFF* */
57 /* *INDENT-ON* */
65 /** get field out of 32 bit register */
66 #define AL_REG_FIELD_GET(reg, mask, shift) (((reg) & (mask)) >> (shift)) argument
68 /** set field of 32 bit register */
69 #define AL_REG_FIELD_SET(reg, mask, shift, val) \ argument
71 (((reg) & (~(mask))) | \
72 ((((unsigned)(val)) << (shift)) & (mask)))
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/freebsd/sys/contrib/dev/rtw88/
H A Dhci.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2018-2019 Realtek Corporation
40 return rtwdev->hci.ops->tx_write(rtwdev, pkt_info, skb); in rtw_hci_tx_write()
45 return rtwdev->hci.ops->tx_kick_off(rtwdev); in rtw_hci_tx_kick_off()
50 return rtwdev->hci.ops->setup(rtwdev); in rtw_hci_setup()
55 return rtwdev->hci.ops->start(rtwdev); in rtw_hci_start()
60 rtwdev->hci.ops->stop(rtwdev); in rtw_hci_stop()
65 rtwdev->hci.ops->deep_ps(rtwdev, enter); in rtw_hci_deep_ps()
70 rtwdev->hci.ops->link_ps(rtwdev, enter); in rtw_hci_link_ps()
75 rtwdev->hci.ops->interface_cfg(rtwdev); in rtw_hci_interface_cfg()
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/freebsd/sys/contrib/device-tree/Bindings/hwmon/
H A Dmax6697.txt4 - compatible:
16 - reg: I2C address
20 - smbus-timeout-disable
23 - extended-range-enable
26 - beta-compensation-enable
30 - alert-mask
31 Alert bit mask. Alert disabled for bits set.
32 Select bit 0 for local temperature, bit 1..7 for remote temperatures.
34 - over-temperature-mask
35 Over-temperature bit mask. Over-temperature reporting disabled for
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/freebsd/contrib/processor-trace/libipt/internal/include/
H A Dpt_opcodes.h2 * Copyright (c) 2013-2019, Intel Corporation
81 /* A one byte opcode mask. */
88 /* The bit mask for the compression bits in the opcode. */
94 /* The bit mask for the compression bits after shifting. */
105 /* The bit mask for the IP bit in the exstop packet. */
111 /* The bit mask for the IP bit in the ptw packet. */
114 /* The bit mask and shr value for the payload bytes field in ptw. */
118 /* The bit mask for the payload bytes field in ptw after shifting. */
153 * The payload is a repeating 2-byte pattern.
173 /* The shift counts for post-processing the PIP payload. */
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/freebsd/crypto/heimdal/kadmin/
H A Dutil.c2 * Copyright (c) 1997 - 2006 Kungliga Tekniska Högskolan
38 * util.c - functions for parsing, unparsing, and editing different
50 { "allow-digest", KRB5_KDB_ALLOW_DIGEST },
51 { "allow-kerberos4", KRB5_KDB_ALLOW_KERBEROS4 },
52 { "trusted-for-delegation", KRB5_KDB_TRUSTED_FOR_DELEGATION },
53 { "ok-as-delegate", KRB5_KDB_OK_AS_DELEGATE },
54 { "new-princ", KRB5_KDB_NEW_PRINC },
55 { "support-desmd5", KRB5_KDB_SUPPORT_DESMD5 },
56 { "pwchange-service", KRB5_KDB_PWCHANGE_SERVICE },
57 { "disallow-svr", KRB5_KDB_DISALLOW_SVR },
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/freebsd/sys/dev/tpm/
H A Dtpm_tis_core.c1 /*-
48 #define TPM_ACCESS_LOC_REQ BIT(1)
49 #define TPM_ACCESS_LOC_Seize BIT(3)
50 #define TPM_ACCESS_LOC_ACTIVE BIT(5)
51 #define TPM_ACCESS_LOC_RELINQUISH BIT(5)
52 #define TPM_ACCESS_VALID BIT(7)
54 #define TPM_INT_ENABLE_GLOBAL_ENABLE BIT(31)
55 #define TPM_INT_ENABLE_CMD_RDY BIT(7)
56 #define TPM_INT_ENABLE_LOC_CHANGE BIT(2)
57 #define TPM_INT_ENABLE_STS_VALID BIT(1)
[all …]
H A Dtpm_tis.c
H A Dtpm_crb.c1 /*-
54 #define TPM_LOC_STATE_ESTB BIT(0)
55 #define TPM_LOC_STATE_ASSIGNED BIT(1)
57 #define TPM_LOC_STATE_VALID BIT(7)
62 #define TPM_LOC_CTRL_REQUEST BIT(0)
63 #define TPM_LOC_CTRL_RELINQUISH BIT(1)
65 #define TPM_CRB_CTRL_REQ_GO_READY BIT(0)
66 #define TPM_CRB_CTRL_REQ_GO_IDLE BIT(1)
68 #define TPM_CRB_CTRL_STS_ERR_BIT BIT(0)
69 #define TPM_CRB_CTRL_STS_IDLE_BIT BIT(1)
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/freebsd/contrib/llvm-project/clang/lib/Headers/
H A Dsmmintrin.h1 /*===---- smmintrin.h - SSE4 intrinsics ------------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
22 __target__("sse4.1,no-evex512"), __min_vector_width__(128)))
41 /// Rounds up each element of the 128-bit vector of [4 x float] to an
42 /// integer and returns the rounded values in a 128-bit vector of
54 /// A 128-bit vector of [4 x float] values to be rounded up.
55 /// \returns A 128-bit vector of [4 x float] containing the rounded values.
58 /// Rounds up each element of the 128-bit vector of [2 x double] to an
59 /// integer and returns the rounded values in a 128-bit vector of
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/freebsd/secure/lib/libcrypto/man/man3/
H A DOPENSSL_s390xcap.31 .\" -*- mode: troff; coding: utf-8 -*-
58 .TH OPENSSL_S390XCAP 3ossl 2025-09-30 3.5.4 OpenSSL
64 OPENSSL_s390xcap \- the IBM z processor capabilities vector
80 with a mask which is derived from the environment variable.
82 The environment variable is a semicolon-separated list of tokens which is
92 The name of a processor generation. A bit in the environment variable's
93 mask is set to one if and only if the specified processor generation
97 .IP <string>:<mask>:<mask> 4
98 .IX Item "<string>:<mask>:<mask>"
99 The name of an instruction followed by two 64\-bit masks. The part of the
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/freebsd/sys/dev/ice/
H A Dice_bitops.h1 /* SPDX-License-Identifier: BSD-3-Clause */
50 /* Determine which chunk a bit belongs in */
53 #define BITS_TO_CHUNKS(sz) (((sz) + BITS_PER_CHUNK - 1) / BITS_PER_CHUNK)
54 /* Which bit inside a chunk this bit corresponds to */
57 #define LAST_CHUNK_BITS(nr) ((((nr) - 1) % BITS_PER_CHUNK) + 1)
60 (BITS_PER_CHUNK - LAST_CHUNK_BITS(nr)))
67 return !!(*bitmap & BIT(nr)); in ice_is_bit_set_internal()
80 * and define macro ICE_ATOMIC_BITOPS to overwrite the default non-atomic
85 *bitmap &= ~BIT(nr); in ice_clear_bit_internal()
90 *bitmap |= BIT(nr); in ice_set_bit_internal()
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/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrAnalysis.h1 //===- llvm/MC/MCInstrAnalysis.h - InstrDesc target hooks -------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
46 /// sufficient. Some examples are auipc/jalr pairs on RISC-V or adrp/ldr pairs
56 return Info->get(Inst.getOpcode()).isBranch(); in isBranch()
60 return Info->get(Inst.getOpcode()).isConditionalBranch(); in isConditionalBranch()
64 return Info->get(Inst.getOpcode()).isUnconditionalBranch(); in isUnconditionalBranch()
68 return Info->get(Inst.getOpcode()).isIndirectBranch(); in isIndirectBranch()
72 return Info->get(Inst.getOpcode()).isCall(); in isCall()
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/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/
H A DSupport.h1 //===----------
100 getResourceStateIndex(uint64_t Mask) getResourceStateIndex() argument
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/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/
H A DBitVector.h1 //===- llvm/ADT/BitVector.h - Bit vectors -----------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
39 assert(Current != -1 && "Trying to advance past end."); in advance()
98 // Encapsulation of a single bit.
138 return const_set_bits_iterator(*this, -1); in set_bits_end()
144 /// BitVector default ctor - Creates an empty bitvector.
147 /// BitVector ctor - Creates a bitvector of specified number of bits. All
150 : Bits(NumBitWords(s), 0 - (BitWord)t), Size(s) { in NumBitWords()
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H A DSmallBitVector.h1 //===- llvm/ADT/SmallBitVector.h - 'Normally small' bit vectors -*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
30 /// This is a 'bitvector' (really, a variable-sized bit array), optimized for
31 /// the case when the array is small. It contains one pointer-sized field, which
33 /// pointer to a larger heap-allocated array when necessary. This allows normal
45 // One bit is used to discriminate between small and large mode. The
46 // remaining bits are used for the small-mode representation.
47 SmallNumRawBits = NumBaseBits - 1,
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/freebsd/sys/contrib/dev/rtw89/
H A Ddebug.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Realtek Corporation
18 RTW89_DBG_TXRX = BIT(0),
19 RTW89_DBG_RFK = BIT(1),
20 RTW89_DBG_RFK_TRACK = BIT(2),
21 RTW89_DBG_CFO = BIT(
77 rtw89_hex_dump(struct rtw89_dev * rtwdev,enum rtw89_debug_mask mask,const char * prefix_str,const void * buf,size_t len) rtw89_hex_dump() argument
88 rtw89_debug(struct rtw89_dev * rtwdev,enum rtw89_debug_mask mask,const char * fmt,...) rtw89_debug() argument
91 rtw89_hex_dump(struct rtw89_dev * rtwdev,enum rtw89_debug_mask mask,const char * prefix_str,const void * buf,size_t len) rtw89_hex_dump() argument
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/freebsd/crypto/openssl/doc/man3/
H A DOPENSSL_s390xcap.pod5 OPENSSL_s390xcap - the IBM z processor capabilities vector
21 with a mask which is derived from the environment variable.
23 The environment variable is a semicolon-separated list of tokens which is
34 The name of a processor generation. A bit in the environment variable's
35 mask is set to one if and only if the specified processor generation
40 =item <string>:<mask>:<mask>
42 The name of an instruction followed by two 64-bit masks. The part of the
43 environment variable's mask corresponding to the specified instruction is
44 set to the specified 128-bit mask. Possible values are B<kimd>, B<klmd>,
48 =item stfle:<mask>:<mask>:<mask>
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/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Dfsl,ls-ftm-alarm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/fsl,ls-ftm-alarm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
15 - fsl,ls1012a-ftm-alarm
16 - fsl,ls1021a-ftm-alarm
17 - fsl,ls1028a-ftm-alarm
18 - fsl,ls1043a-ftm-alarm
19 - fsl,ls1046a-ftm-alarm
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/freebsd/sys/dev/aic7xxx/
H A Daic7xxx.reg1 /*-
4 * Copyright (c) 1994-2001 Justin T. Gibbs.
5 * Copyright (c) 2000-2001 Adaptec Inc.
19 * 3. Neither the names of the above-listed copyright holders nor the names
47 * All page numbers refer to the Adaptec AIC-7770 Data Book available from
48 * Adaptec's Technical Documents Department 1-800-934-2766
52 * SCSI Sequence Control (p. 3-11).
53 * Each bit, when set starts a specific SCSI sequence on the bus
69 * SCSI Transfer Control 0 Register (pp. 3-13).
85 * SCSI Transfer Control 1 Register (pp. 3-14,15).
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/freebsd/sys/dev/msk/
H A Dif_mskreg.h17 * are provided to you under the BSD-type license terms provided
22 * - Redistributions of source code must retain the above copyright
24 * - Redistributions in binary form must reproduce the above
28 * - Neither the name of Marvell nor the names of its contributors
48 /*-
49 * SPDX-License-Identifier: BSD-4-Clause AND BSD-3-Clause
65 * 4. Neither the name of the author nor the names of any co-contributors
82 /*-
110 * D-Link PCI vendor ID
154 * D-Link gigabit ethernet device ID
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