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/linux/Documentation/arch/sh/
H A Dregister-banks.rst11 bank (selected by SR.RB, only r0 ... r7 are banked), whereas other families
17 In the case of this type of banking, banked registers are mapped directly to
19 can still be used to reference the banked registers (as r0_bank ... r7_bank)
21 in mind when writing code that utilizes these banked registers, for obvious
/linux/drivers/i2c/
H A Di2c-stub.c44 /* Some chips have banked register ranges */
56 MODULE_PARM_DESC(bank_start, "First banked register");
60 MODULE_PARM_DESC(bank_end, "Last banked register");
214 * We ignore banks here, because banked chips don't use I2C in stub_xfer()
383 /* Allocate extra memory for banked register ranges */ in i2c_stub_init()
/linux/drivers/clocksource/
H A Darm_global_timer.c31 #define GT_CONTROL_TIMER_ENABLE BIT(0) /* this bit is NOT banked */
32 #define GT_CONTROL_COMP_ENABLE BIT(1) /* banked */
33 #define GT_CONTROL_IRQ_ENABLE BIT(2) /* banked */
34 #define GT_CONTROL_AUTO_INC BIT(3) /* banked */
/linux/arch/arm/mach-omap2/
H A Domap-headsmp.S111 * banked version is now composed of 2 bits:
114 * The Non-Secure banked register has not changed
H A Domap-smp.c212 * banked version is now composed of 2 bits: in omap4_boot_secondary()
215 * The Non-Secure banked register has not changed in omap4_boot_secondary()
/linux/drivers/nvmem/
H A Dimx-ocotp.c362 * In banked/i.MX7 mode the OTP register bank goes into waddr in imx_ocotp_write()
371 * Non-banked i.MX6 mode. in imx_ocotp_write()
402 * Note: on i.MX7 there are four data fields to write for banked write in imx_ocotp_write()
408 /* Banked/i.MX7 mode */ in imx_ocotp_write()
436 /* Non-banked i.MX6 mode */ in imx_ocotp_write()
/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-davinci.yaml49 The interrupts are specified as per the interrupt parent. Only banked
51 banked then provide list of interrupts corresponding to each bank, else
/linux/arch/sh/
H A DKconfig.cpu86 accomplishing what is taken care of by the banked registers.
/linux/Documentation/i2c/
H A Di2c-stub.rst57 select the active bank, as well as the range of banked registers.
/linux/drivers/gpio/
H A Dgpio-davinci.c168 * interrupts is equal to number of gpios else all are banked so in davinci_gpio_probe()
491 * banked IRQs. Having GPIOs in the first GPIO bank use direct in davinci_gpio_irq_setup()
492 * IRQs, while the others use banked IRQs, would need some setup in davinci_gpio_irq_setup()
/linux/Documentation/arch/arm/
H A Dsetup.rst23 the memory is banked, then this should contain the total number
/linux/drivers/irqchip/
H A Dirq-sun6i-r.c35 * ^ bits 16-18 are direct IRQs for peripherals with banked interrupts, such as
38 * The H6 variant adds two more (banked) direct IRQs and implements the full
H A Dirq-gic-common.c126 * Deal with the banked PPI and SGI interrupts - disable all in gic_cpu_config()
H A Dirq-gic.c18 * registers are banked per-cpu for these sources.
1002 * is a banked register, we can only forward the SGI using in gic_migrate_target()
1169 /* Frankein-GIC without banked registers... */ in gic_init_bases()
1547 * There is no support for non-banked GICv1/2 register in ACPI spec. in gic_acpi_parse_madt_cpu()
H A Dirq-hip04.c22 * registers are banked per-cpu for these sources.
/linux/drivers/phy/st/
H A Dphy-miphy28lp.c433 /* Banked settings */ in miphy28lp_sata_config_gen()
460 /* Banked settings */ in miphy28lp_pcie_config_gen()
644 /* Banked settings Gen1/Gen2/Gen3 */ in miphy28lp_configure_sata()
687 /* Banked settings Gen1/Gen2 */ in miphy28lp_configure_pcie()
/linux/arch/arm/kernel/
H A Dsleep.S129 bl cpu_init @ restore the und/abt/irq banked regs
/linux/arch/arc/kernel/
H A Dentry-arcv2.S88 ; icause is banked: one per priority level
/linux/Documentation/virt/kvm/devices/
H A Darm-vgic.rst61 fields are not banked, but return the same value regardless of the
H A Darm-vgic-v3.rst122 Note that distributor fields are not banked, but return the same value
/linux/drivers/soundwire/
H A Ddebugfs.c69 /* DP0 non-banked registers */ in sdw_slave_reg_show()
/linux/arch/sh/kernel/
H A Dkgdb.c235 * switch_to() relies on SR.RB toggling, so regs 0->7 are banked in sleeping_thread_to_gdb_regs()
/linux/drivers/net/ethernet/ti/icssg/
H A Dicssg_prueth.h255 * @banked_ms_ram: banked memory support
/linux/drivers/usb/isp1760/
H A Disp1760-udc.c142 * The ISP1761 endpoint registers are banked. This function selects the target
143 * endpoint for banked register access. The selection remains valid until the
/linux/include/linux/soundwire/
H A Dsdw.h766 * parameters. All these parameters are banked and can be modified

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