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Searched +full:ast2600 +full:- +full:gpio (Results 1 – 19 of 19) sorted by relevance

/linux/Documentation/devicetree/bindings/fsi/
H A Daspeed,ast2600-fsi-master.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eddie James <eajames@linux.ibm.com>
13 The AST2600 and later contain two identical FSI masters. They share a
19 - aspeed,ast2600-fsi-master
20 - aspeed,ast2700-fsi-master
25 cfam-reset-gpios:
28 Output GPIO pin for CFAM reset
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/linux/Documentation/devicetree/bindings/gpio/
H A Daspeed,sgpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
13 This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
14 AST2600 have two sgpio master one with 128 pins another one with 80 pins,
16 GPIO pins can be programmed to support the following options
17 - Support interrupt option for each input port and various interrupt
18 sensitivity option (level-high, level-low, edge-high, edge-low)
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/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-ast2600-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
10 model = "AST2600 EVB";
11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
34 compatible = "shared-dma-pool";
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H A Daspeed-bmc-qcom-dc-scm-v1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
9 model = "Qualcomm DC-SCM V1 BMC";
10 compatible = "qcom,dc-scm-v1-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
30 ethphy3: ethernet-phy@1 {
31 compatible = "ethernet-phy-ieee802.3-c22";
40 phy-mode = "rgmii";
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H A Daspeed-bmc-ufispace-ncplite.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "ufispace,ncplite-bmc", "aspeed,ast2600";
18 stdout-path = &uart5;
27 iio-hwmon {
28 compatible = "iio-hwmon";
29 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
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H A Daspeed-bmc-facebook-greatlakes.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/leds/leds-pca955x.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,greatlakes-bmc", "aspeed,ast2600";
23 iio-hwmon {
24 compatible = "iio-hwmon";
25 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
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H A Daspeed-bmc-inventec-transformers.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include "aspeed-g6-pinctrl.dtsi"
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/gpio/aspeed-gpio.h>
13 compatible = "inventec,transformer-bmc", "aspeed,ast2600";
20 stdout-path = &uart5;
30 compatible = "gpio-leds";
49 ethphy0: ethernet-phy@0 {
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H A Daspeed-bmc-inventec-starscream.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include "aspeed-g6-pinctrl.dtsi"
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/gpio/aspeed-gpio.h>
13 compatible = "inventec,starscream-bmc", "aspeed,ast2600";
20 stdout-path = &uart5;
28 reserved-memory {
29 #address-cells = <1>;
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H A Daspeed-bmc-ibm-bonnell.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,bonnell-bmc", "aspeed,ast2600";
23 stdout-path = &uart5;
32 reserved-memory {
33 #address-cells = <1>;
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H A Daspeed-bmc-opp-tacoma.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,tacoma-bmc", "aspeed,ast2600";
15 stdout-path = &uart5;
24 reserved-memory {
25 #address-cells = <1>;
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H A Daspeed-bmc-facebook-bletchley.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/usb/pd.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/i2c/i2c.h>
14 compatible = "facebook,bletchley-bmc", "aspeed,ast2600";
29 iio-hwmon {
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H A Daspeed-bmc-ibm-system1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,system1-bmc", "aspeed,ast2600";
74 stdout-path = "uart5:115200n8";
82 reserved-memory {
83 #address-cells = <1>;
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/linux/drivers/fsi/
H A Dfsi-master-aspeed.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 // FSI master driver for AST2600
17 #include <linux/gpio/consumer.h>
19 #include "fsi-master.h"
100 void __iomem *base = aspeed->base; in __opb_write()
129 return -EIO; in __opb_write()
152 void __iomem *base = aspeed->base; in __opb_read()
184 return -EIO; in __opb_read()
198 return -EINVAL; in __opb_read()
238 if (err == -EIO) { in check_errors()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 FSI - the FRU Support Interface - is a simple bus for low-level
12 access to POWER-based hardware.
29 symlinks in /dev/fsi/by-path when this option is enabled.
32 tristate "GPIO-based FSI master"
36 This option enables a FSI master driver using GPIO lines.
52 This option enables a FSI master using the AST2400 and AST2500 GPIO
61 in the AST2600.
84 a pipe-like FSI device for communicating with the self boot engine
91 This option enables an SBEFIFO based On-Chip Controller (OCC) device
/linux/drivers/gpio/
H A Dgpio-aspeed-sgpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/gpio/driver.h>
50 * Note: The "value" register returns the input value when the GPIO is
53 * The "rdata" register returns the output value when the GPIO is
105 static void __iomem *bank_reg(struct aspeed_sgpio *gpio, in bank_reg() argument
111 return gpio->base + bank->val_regs + GPIO_VAL_VALUE; in bank_reg()
113 return gpio->base + bank->rdata_reg; in bank_reg()
115 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE; in bank_reg()
117 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0; in bank_reg()
119 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1; in bank_reg()
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H A Dgpio-aspeed.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/gpio/aspeed.h>
11 #include <linux/gpio/driver.h>
26 * These two headers aren't meant to be used by GPIO drivers. We need
31 #include <linux/gpio/consumer.h>
34 /* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */
35 #define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
36 #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask))
76 * represents disabled debouncing for the GPIO. Any other value for an element
110 * line even when the GPIO is configured as an output. Since
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/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g6.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include "../pinctrl-utils.h"
18 #include "pinctrl-aspeed.h"
21 #define SCU400 0x400 /* Multi-function Pin Control #1 */
22 #define SCU404 0x404 /* Multi-function Pin Control #2 */
23 #define SCU40C 0x40C /* Multi-function Pin Control #3 */
24 #define SCU410 0x410 /* Multi-function Pin Control #4 */
25 #define SCU414 0x414 /* Multi-function Pin Control #5 */
26 #define SCU418 0x418 /* Multi-function Pin Control #6 */
27 #define SCU41C 0x41C /* Multi-function Pin Control #7 */
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H A Dpinctrl-aspeed-g5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/pinctrl/pinconf-generic.h>
21 #include "../pinctrl-utils.h"
22 #include "pinctrl-aspeed.h"
32 * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
35 * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
45 #define SCU80 0x80 /* Multi-function Pin Control #1 */
46 #define SCU84 0x84 /* Multi-function Pin Control #2 */
47 #define SCU88 0x88 /* Multi-function Pin Control #3 */
48 #define SCU8C 0x8C /* Multi-function Pin Control #4 */
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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