Searched +full:anatop +full:- +full:min +full:- +full:bit +full:- +full:val (Results 1 – 9 of 9) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-anatop.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: ANATOP register10 - Shawn Guo <shawnguo@kernel.org>11 - Sascha Hauer <s.hauer@pengutronix.de>16 - items:17 - enum:18 - fsl,imx6sl-anatop[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/regulator/anatop-regulator.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Freescale Anatop Voltage Regulators10 - Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>13 - $ref: regulator.yaml#17 const: fsl,anatop-regulator19 regulator-name: true21 anatop-reg-offset:[all …]
1 // SPDX-License-Identifier: GPL-2.0+39 u32 val; in anatop_regmap_set_voltage_time_sel() local43 if (anatop_reg->delay_bit_width && new_sel > old_sel) { in anatop_regmap_set_voltage_time_sel()50 regmap_read(reg->regmap, anatop_reg->delay_reg, &val); in anatop_regmap_set_voltage_time_sel()51 val = (val >> anatop_reg->delay_bit_shift) & in anatop_regmap_set_voltage_time_sel()52 ((1 << anatop_reg->delay_bit_width) - 1); in anatop_regmap_set_voltage_time_sel()53 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES << in anatop_regmap_set_voltage_time_sel()54 val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1; in anatop_regmap_set_voltage_time_sel()65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_enable()85 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { in anatop_regmap_core_set_voltage_sel()[all …]
1 // SPDX-License-Identifier: GPL-2.05 #include <dt-bindings/interrupt-controller/irq.h>6 #include "imx6sl-pinfunc.h"7 #include <dt-bindings/clock/imx6sl-clock.h>10 #address-cells = <1>;11 #size-cells = <1>;14 * pre-existing /chosen node to be available to insert the50 #address-cells = <1>;51 #size-cells = <0>;54 compatible = "arm,cortex-a9";[all …]
1 // SPDX-License-Identifier: GPL-2.0+6 #include <dt-bindings/clock/imx6qdl-clock.h>7 #include <dt-bindings/input/input.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #address-cells = <1>;12 #size-cells = <1>;15 * pre-existing /chosen node to be available to insert the58 compatible = "fixed-clock";59 #clock-cells = <0>;60 clock-frequency = <32768>;[all …]
1 // SPDX-License-Identifier: GPL-2.05 #include <dt-bindings/clock/imx6sx-clock.h>6 #include <dt-bindings/gpio/gpio.h>7 #include <dt-bindings/input/input.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include "imx6sx-pinfunc.h"12 #address-cells = <1>;13 #size-cells = <1>;16 * pre-existing /chosen node to be available to insert the60 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.05 #include <dt-bindings/clock/imx6ul-clock.h>6 #include <dt-bindings/gpio/gpio.h>7 #include <dt-bindings/input/input.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include "imx6ul-pinfunc.h"12 #address-cells = <1>;13 #size-cells = <1>;16 * pre-existing /chosen node to be available to insert the57 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT6 #include <dt-bindings/clock/imx7d-clock.h>7 #include <dt-bindings/power/imx7-power.h>8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/input/input.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/reset/imx7-reset.h>12 #include "imx7d-pinfunc.h"15 #address-cells = <1>;16 #size-cells = <1>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)4 * Copyright 2017-2018 NXP.8 #include <dt-bindings/clock/imx6sll-clock.h>9 #include <dt-bindings/gpio/gpio.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include "imx6sll-pinfunc.h"14 #address-cells = <1>;15 #size-cells = <1>;46 #address-cells = <1>;47 #size-cells = <0>;[all …]