Searched full:aesmcrr (Results 1 – 8 of 8) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64MacroFusion.cpp | 126 case AArch64::AESMCrr: in isAESPair()
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| H A D | AArch64SchedCyclone.td | 598 def : InstRW<[CyWriteCrypto2], (instrs AESIMCrr, AESMCrr, SHA1Hrr,
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| H A D | AArch64SchedNeoverseN1.td | 1037 def : InstRW<[N1Write_2c_1V0, N1ReadVC], (instrs AESMCrr, AESIMCrr)>;
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| H A D | AArch64ExpandPseudoInsts.cpp | 1537 TII->get(Opcode == AArch64::AESMCrrTied ? AArch64::AESMCrr : in expandMI()
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| H A D | AArch64SchedFalkorDetails.td | 1082 def : InstRW<[FalkorWr_1VXVY_2cyc], (instrs AESIMCrr, AESMCrr)>;
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| H A D | AArch64SchedKryoDetails.td | 429 (instrs AESIMCrr, AESMCrr)>;
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| H A D | AArch64SchedNeoverseV1.td | 1389 def : InstRW<[V1Write_2c_1V, V1ReadVC], (instrs AESMCrr, AESIMCrr)>;
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| H A D | AArch64InstrInfo.td | 9270 def AESMCrr : AESInst< 0b0110, "aesmc", int_aarch64_crypto_aesmc>; 9274 // Pseudo instructions for AESMCrr/AESIMCrr with a register constraint required
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