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/linux/drivers/iio/adc/
H A Dpalmas_gpadc.c3 * palmas-adc.c -- TI PALMAS GPADC.
131 static struct palmas_adc_event *palmas_gpadc_get_event(struct palmas_gpadc *adc, in palmas_gpadc_get_event() argument
135 if (adc_chan == adc->event0.channel && dir == adc->event0.direction) in palmas_gpadc_get_event()
136 return &adc->event0; in palmas_gpadc_get_event()
138 if (adc_chan == adc->event1.channel && dir == adc->event1.direction) in palmas_gpadc_get_event()
139 return &adc->event1; in palmas_gpadc_get_event()
144 static bool palmas_gpadc_channel_is_freerunning(struct palmas_gpadc *adc, in palmas_gpadc_channel_is_freerunning() argument
147 return palmas_gpadc_get_event(adc, adc_chan, IIO_EV_DIR_RISING) || in palmas_gpadc_channel_is_freerunning()
148 palmas_gpadc_get_event(adc, adc_chan, IIO_EV_DIR_FALLING); in palmas_gpadc_channel_is_freerunning()
175 static int palmas_disable_auto_conversion(struct palmas_gpadc *adc) in palmas_disable_auto_conversion() argument
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H A Dstm32-adc.c3 * This file is part of STM32 ADC driver
32 #include "stm32-adc-core.h"
37 /* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */
95 * struct stm32_adc_ic - ADC internal channels
113 * struct stm32_adc_trig_info - ADC trigger info
123 * struct stm32_adc_calib - optional adc calibration data
133 * struct stm32_adc_regs - stm32 ADC misc registers & bitfield desc
145 * struct stm32_adc_vrefint - stm32 ADC internal reference voltage data
213 * @smp_cycles: programmable sampling time (ADC clock cycles)
237 * struct stm32_adc - private data of each ADC II
601 stm32_adc_readl(struct stm32_adc * adc,u32 reg) stm32_adc_readl() argument
612 stm32_adc_readw(struct stm32_adc * adc,u32 reg) stm32_adc_readw() argument
617 stm32_adc_writel(struct stm32_adc * adc,u32 reg,u32 val) stm32_adc_writel() argument
622 stm32_adc_set_bits(struct stm32_adc * adc,u32 reg,u32 bits) stm32_adc_set_bits() argument
631 stm32_adc_set_bits_common(struct stm32_adc * adc,u32 reg,u32 bits) stm32_adc_set_bits_common() argument
639 stm32_adc_clr_bits(struct stm32_adc * adc,u32 reg,u32 bits) stm32_adc_clr_bits() argument
648 stm32_adc_clr_bits_common(struct stm32_adc * adc,u32 reg,u32 bits) stm32_adc_clr_bits_common() argument
660 stm32_adc_conv_irq_enable(struct stm32_adc * adc) stm32_adc_conv_irq_enable() argument
670 stm32_adc_conv_irq_disable(struct stm32_adc * adc) stm32_adc_conv_irq_disable() argument
676 stm32_adc_ovr_irq_enable(struct stm32_adc * adc) stm32_adc_ovr_irq_enable() argument
682 stm32_adc_ovr_irq_disable(struct stm32_adc * adc) stm32_adc_ovr_irq_disable() argument
688 stm32_adc_set_res(struct stm32_adc * adc) stm32_adc_set_res() argument
701 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_hw_stop() local
714 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_hw_start() local
739 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_int_ch_enable() local
776 stm32_adc_int_ch_disable(struct stm32_adc * adc) stm32_adc_int_ch_disable() argument
821 struct stm32_adc *adc = iio_priv(indio_dev); stm32f4_adc_start_conv() local
841 struct stm32_adc *adc = iio_priv(indio_dev); stm32f4_adc_stop_conv() local
853 struct stm32_adc *adc = iio_priv(indio_dev); stm32f4_adc_irq_clear() local
860 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_start_conv() local
881 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_stop_conv() local
899 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_irq_clear() local
906 struct stm32_adc *adc = iio_priv(indio_dev); stm32mp13_adc_start_conv() local
917 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_set_ovs() local
942 struct stm32_adc *adc = iio_priv(indio_dev); stm32mp13_adc_set_ovs() local
967 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_exit_pwr_down() local
996 stm32h7_adc_enter_pwr_down(struct stm32_adc * adc) stm32h7_adc_enter_pwr_down() argument
1007 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_enable() local
1030 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_disable() local
1053 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_read_selfcalib() local
1090 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_restore_selfcalib() local
1163 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_selfcalib() local
1223 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_check_selfcalib() local
1253 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_prepare() local
1304 struct stm32_adc *adc = iio_priv(indio_dev); stm32h7_adc_unprepare() local
1327 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_conf_scan_seq() local
1378 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_get_trig_extsel() local
1409 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_set_trig() local
1439 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_set_trig_pol() local
1449 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_get_trig_pol() local
1481 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_single_conv() local
1540 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_write_raw() local
1583 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_read_avail() local
1600 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_read_raw() local
1648 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_irq_clear() local
1656 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_threaded_isr() local
1679 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_isr() local
1730 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_set_watermark() local
1749 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_update_scan_mode() local
1795 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_debugfs_reg_access() local
1824 stm32_adc_dma_residue(struct stm32_adc * adc) stm32_adc_dma_residue() argument
1852 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_dma_buffer_done() local
1880 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_dma_start() local
1918 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_buffer_postenable() local
1960 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_buffer_predisable() local
1989 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_trigger_handler() local
2018 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_debugfs_init() local
2036 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_fw_get_resolution() local
2057 stm32_adc_smpr_init(struct stm32_adc * adc,int channel,u32 smp_ns) stm32_adc_smpr_init() argument
2087 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_chan_init_one() local
2127 stm32_adc_get_legacy_chan_count(struct iio_dev * indio_dev,struct stm32_adc * adc) stm32_adc_get_legacy_chan_count() argument
2170 stm32_adc_legacy_chan_init(struct iio_dev * indio_dev,struct stm32_adc * adc,struct iio_chan_spec * channels,int nchans) stm32_adc_legacy_chan_init() argument
2261 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_populate_int_ch() local
2323 stm32_adc_generic_chan_init(struct iio_dev * indio_dev,struct stm32_adc * adc,struct iio_chan_spec * channels) stm32_adc_generic_chan_init() argument
2397 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_chan_fw_init() local
2466 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_dma_request() local
2515 struct stm32_adc *adc; stm32_adc_probe() local
2641 struct stm32_adc *adc = iio_priv(indio_dev); stm32_adc_remove() local
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H A Dqcom-spmi-adc5-gen3.c18 #include <linux/iio/adc/qcom-adc5-gen3-common.h>
36 * struct adc5_channel_prop - ADC channel structure
37 * @common_props: structure with ADC channel properties (common to TM usage).
39 * @chip: pointer to top-level ADC device structure.
48 * struct adc5_chip - ADC private structure.
50 * @dev_data: Top-level ADC device data.
51 * @nchannels: number of ADC channels.
52 * @chan_props: array of ADC channel properties.
54 * @complete: ADC result notification after interrupt is received.
55 * @lock: ADC lock for access to the peripheral, to prevent concurrent
[all …]
H A DKconfig3 # ADC drivers
17 Say Y here to enable support for the GPADC (General Purpose ADC)
43 tristate "Analog Devices AD4000 ADC Driver"
51 SPI analog to digital converters (ADC). If intended to use with
60 tristate "Analog Devices AD4030 ADC Driver"
73 SPI analog to digital converters (ADC).
87 to digital converters (ADC).
93 tristate "Analog Devices AD4080 high speed ADC"
101 converter (ADC). Supports iio_backended devices for AD4080.
107 tristate "Analog Device AD4130 ADC Drive
[all...]
H A Drzt2h_adc.c7 #include <linux/iio/adc-helpers.h>
49 static void rzt2h_adc_start(struct rzt2h_adc *adc, unsigned int conversion_type) in rzt2h_adc_start() argument
53 reg = readw(adc->base + RZT2H_ADCSR_REG); in rzt2h_adc_start()
61 writew(reg, adc->base + RZT2H_ADCSR_REG); in rzt2h_adc_start()
64 static void rzt2h_adc_stop(struct rzt2h_adc *adc) in rzt2h_adc_stop() argument
68 reg = readw(adc->base + RZT2H_ADCSR_REG); in rzt2h_adc_stop()
73 writew(reg, adc->base + RZT2H_ADCSR_REG); in rzt2h_adc_stop()
76 static int rzt2h_adc_read_single(struct rzt2h_adc *adc, unsigned int ch, int *val) in rzt2h_adc_read_single() argument
80 ret = pm_runtime_resume_and_get(adc->dev); in rzt2h_adc_read_single()
84 mutex_lock(&adc->lock); in rzt2h_adc_read_single()
[all …]
H A Dstm32-dfsdm-adc.c3 * This file is the ADC part of the STM32 DFSDM driver
12 #include <linux/iio/adc/stm32-dfsdm-adc.h>
80 /* ADC specific */
319 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_compute_all_osrs() local
320 struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id]; in stm32_dfsdm_compute_all_osrs()
340 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_start_channel() local
341 struct regmap *regmap = adc->dfsdm->regmap; in stm32_dfsdm_start_channel()
346 for_each_set_bit(bit, &adc->smask, sizeof(adc->smask) * BITS_PER_BYTE) { in stm32_dfsdm_start_channel()
360 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_stop_channel() local
361 struct regmap *regmap = adc->dfsdm->regmap; in stm32_dfsdm_stop_channel()
[all …]
H A Dingenic-adc.c3 * ADC driver for the Ingenic JZ47xx SoCs
6 * based on drivers/mfd/jz4740-adc.c
9 #include <dt-bindings/iio/adc/ingenic,adc.h>
104 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
118 struct ingenic_adc *adc = iio_priv(iio_dev); in ingenic_adc_set_adcmd()
120 guard(mutex)(&adc->lock); in ingenic_adc_set_adcmd()
123 readl(adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
130 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
136 adc in ingenic_adc_set_adcmd()
116 struct ingenic_adc *adc = iio_priv(iio_dev); ingenic_adc_set_adcmd() local
169 ingenic_adc_set_config(struct ingenic_adc * adc,uint32_t mask,uint32_t val) ingenic_adc_set_config() argument
184 ingenic_adc_enable_unlocked(struct ingenic_adc * adc,int engine,bool enabled) ingenic_adc_enable_unlocked() argument
200 ingenic_adc_enable(struct ingenic_adc * adc,int engine,bool enabled) ingenic_adc_enable() argument
209 ingenic_adc_capture(struct ingenic_adc * adc,int engine) ingenic_adc_capture() argument
243 struct ingenic_adc *adc = iio_priv(iio_dev); ingenic_adc_write_raw() local
314 jz4725b_adc_init_clk_div(struct device * dev,struct ingenic_adc * adc) jz4725b_adc_init_clk_div() argument
350 jz4770_adc_init_clk_div(struct device * dev,struct ingenic_adc * adc) jz4770_adc_init_clk_div() argument
613 struct ingenic_adc *adc = iio_priv(iio_dev); ingenic_adc_read_avail() local
636 struct ingenic_adc *adc = iio_priv(iio_dev); ingenic_adc_read_chan_info_raw() local
692 struct ingenic_adc *adc = iio_priv(iio_dev); ingenic_adc_read_raw() local
746 struct ingenic_adc *adc = iio_priv(iio_dev); ingenic_adc_buffer_enable() local
778 struct ingenic_adc *adc = iio_priv(iio_dev); ingenic_adc_buffer_disable() local
802 struct ingenic_adc *adc = iio_priv(iio_dev); ingenic_adc_irq() local
824 struct ingenic_adc *adc; ingenic_adc_probe() local
[all...]
H A Dad7944.c3 * Analog Devices AD7944/85/86 PulSAR ADC family driver.
174 * is only one supported provider, namely the ADI PULSAR ADC HDL project,
185 static int ad7944_3wire_cs_mode_init_msg(struct device *dev, struct ad7944_adc *adc, in ad7944_3wire_cs_mode_init_msg() argument
188 unsigned int t_conv_ns = adc->always_turbo ? adc->timing_spec->turbo_conv_ns in ad7944_3wire_cs_mode_init_msg()
189 : adc->timing_spec->conv_ns; in ad7944_3wire_cs_mode_init_msg()
190 struct spi_transfer *xfers = adc->xfers; in ad7944_3wire_cs_mode_init_msg()
208 xfers[2].rx_buf = &adc->sample.raw; in ad7944_3wire_cs_mode_init_msg()
212 spi_message_init_with_transfers(&adc->msg, xfers, 3); in ad7944_3wire_cs_mode_init_msg()
214 return devm_spi_optimize_message(dev, adc->spi, &adc->msg); in ad7944_3wire_cs_mode_init_msg()
217 static int ad7944_4wire_mode_init_msg(struct device *dev, struct ad7944_adc *adc, in ad7944_4wire_mode_init_msg() argument
[all …]
H A Dmcp3564.c3 * IIO driver for MCP356X/MCP356XR and MCP346X/MCP346XR series ADC chip family
14 …MCP3461-2-4-Two-Four-Eight-Channel-153.6-ksps-Low-Noise-16-Bit-Delta-Sigma-ADC-Data-Sheet-20006180…
64 * ADC Output Data Format 32-bit (25-bit right justified data + Channel ID):
65 * CHID[3:0] + SGN extension (4 bits) + 24-bit ADC data.
70 * ADC Output Data Format 32-bit (25-bit right justified data):
71 * SGN extension (8-bit) + 24-bit ADC data.
76 * ADC Output Data Format 32-bit (24-bit left justified data):
77 * 24-bit ADC data + 0x00 (8-bit).
78 * It does not allow overrange (ADC code locked to 0xFFFFFF or 0x800000).
82 * ADC Output Data Format 24-bit (default ADC coding):
[all …]
H A Dlpc18xx_adc.c3 * IIO ADC driver for NXP LPC18xx ADC
26 /* LPC18XX ADC registers and bits */
69 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) in lpc18xx_adc_read_chan() argument
74 reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW; in lpc18xx_adc_read_chan()
75 writel(reg, adc->base + LPC18XX_ADC_CR); in lpc18xx_adc_read_chan()
77 ret = readl_poll_timeout(adc->base + LPC18XX_ADC_GDR, reg, in lpc18xx_adc_read_chan()
80 dev_warn(adc->dev, "adc read timed out\n"); in lpc18xx_adc_read_chan()
91 struct lpc18xx_adc *adc = iio_priv(indio_dev); in lpc18xx_adc_read_raw() local
95 mutex_lock(&adc->lock); in lpc18xx_adc_read_raw()
96 *val = lpc18xx_adc_read_chan(adc, chan->channel); in lpc18xx_adc_read_raw()
[all …]
H A Dti-adc0832.c3 * ADC0831/ADC0832/ADC0834/ADC0838 8-bit ADC driver
33 * Max size needed: 16x 1 byte ADC data + 8 bytes timestamp
120 static int adc0831_adc_conversion(struct adc0832 *adc) in adc0831_adc_conversion() argument
122 struct spi_device *spi = adc->spi; in adc0831_adc_conversion()
125 ret = spi_read(spi, &adc->rx_buf, 2); in adc0831_adc_conversion()
132 return (adc->rx_buf[0] << 2 & 0xff) | (adc->rx_buf[1] >> 6); in adc0831_adc_conversion()
135 static int adc0832_adc_conversion(struct adc0832 *adc, int channel, in adc0832_adc_conversion() argument
138 struct spi_device *spi = adc->spi; in adc0832_adc_conversion()
140 .tx_buf = adc->tx_buf, in adc0832_adc_conversion()
141 .rx_buf = adc->rx_buf, in adc0832_adc_conversion()
[all …]
H A Dmax1241.c3 * MAX1241 low-power, 12-bit serial ADC
41 static int max1241_read(struct max1241 *adc) in max1241_read() argument
57 .rx_buf = &adc->data, in max1241_read()
62 return spi_sync_transfer(adc->spi, xfers, ARRAY_SIZE(xfers)); in max1241_read()
70 struct max1241 *adc = iio_priv(indio_dev); in max1241_read_raw() local
74 mutex_lock(&adc->lock); in max1241_read_raw()
76 if (adc->shutdown) { in max1241_read_raw()
77 gpiod_set_value(adc->shutdown, 0); in max1241_read_raw()
79 ret = max1241_read(adc); in max1241_read_raw()
80 gpiod_set_value(adc->shutdown, 1); in max1241_read_raw()
[all …]
H A Dmcp320x.c8 * Driver for following ADC chips from Microchip Technology's:
72 * struct mcp320x - Microchip SPI ADC instance
74 * @msg: SPI message to select a channel and receive a value from the ADC
80 * @chip_info: ADC properties
120 static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel, in mcp320x_adc_conversion() argument
125 if (adc->chip_info->conv_time) { in mcp320x_adc_conversion()
126 ret = spi_sync(adc->spi, &adc->start_conv_msg); in mcp320x_adc_conversion()
130 usleep_range(adc->chip_info->conv_time, in mcp320x_adc_conversion()
131 adc->chip_info->conv_time + 100); in mcp320x_adc_conversion()
134 memset(&adc->rx_buf, 0, sizeof(adc->rx_buf)); in mcp320x_adc_conversion()
[all …]
H A Dti-ads8344.c3 * ADS8344 16-bit 8-Channel ADC driver
26 * Lock protecting access to adc->tx_buff and rx_buff,
76 static int ads8344_adc_conversion(struct ads8344 *adc, int channel, in ads8344_adc_conversion() argument
79 struct spi_device *spi = adc->spi; in ads8344_adc_conversion()
82 adc->tx_buf = ADS8344_START; in ads8344_adc_conversion()
84 adc->tx_buf |= ADS8344_SINGLE_END; in ads8344_adc_conversion()
85 adc->tx_buf |= ADS8344_CHANNEL(channel); in ads8344_adc_conversion()
86 adc->tx_buf |= ADS8344_CLOCK_INTERNAL; in ads8344_adc_conversion()
88 ret = spi_write(spi, &adc->tx_buf, 1); in ads8344_adc_conversion()
94 ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf)); in ads8344_adc_conversion()
[all …]
H A Dmcp3422.c89 static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
93 ret = i2c_master_send(adc->i2c, &newconfig, 1);
95 adc->config = newconfig; in mcp3422_update_config() argument
102 static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config) in mcp3422_update_config()
105 u8 sample_rate = FIELD_GET(MCP3422_SRATE_MASK, adc->config); in mcp3422_update_config()
110 ret = i2c_master_recv(adc->i2c, buf, 4); in mcp3422_read()
114 ret = i2c_master_recv(adc->i2c, buf, 3); in mcp3422_read()
124 static int mcp3422_read_channel(struct mcp3422 *adc, in mcp3422_read()
131 mutex_lock(&adc->lock); in mcp3422_read_channel()
133 if (req_channel != FIELD_GET(MCP3422_CHANNEL_MASK, adc in mcp3422_read_channel()
108 mcp3422_read(struct mcp3422 * adc,int * value,u8 * config) mcp3422_read() argument
130 mcp3422_read_channel(struct mcp3422 * adc,struct iio_chan_spec const * channel,int * value) mcp3422_read_channel() argument
164 struct mcp3422 *adc = iio_priv(iio); mcp3422_read_raw() local
198 struct mcp3422 *adc = iio_priv(iio); mcp3422_write_raw() local
274 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev)); mcp3422_show_samp_freqs() local
285 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev)); mcp3422_show_scales() local
337 struct mcp3422 *adc; mcp3422_probe() local
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H A Dmax1118.c71 struct max1118 *adc = iio_priv(indio_dev); in max1118_read() local
98 .rx_buf = &adc->data, in max1118_read()
105 ret = spi_sync_transfer(adc->spi, xfers + 1, 2); in max1118_read()
107 ret = spi_sync_transfer(adc->spi, xfers, 3); in max1118_read()
112 return adc->data; in max1118_read()
117 struct max1118 *adc = iio_priv(indio_dev); in max1118_get_vref_mV() local
118 const struct spi_device_id *id = spi_get_device_id(adc->spi); in max1118_get_vref_mV()
127 vref_uV = regulator_get_voltage(adc->reg); in max1118_get_vref_mV()
140 struct max1118 *adc = iio_priv(indio_dev); in max1118_read_raw() local
144 mutex_lock(&adc->lock); in max1118_read_raw()
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Datmel,sama9260-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/atmel,sama9260-adc.yaml#
7 title: AT91 sama9260 and similar Analog to Digital Converter (ADC)
15 - atmel,at91sam9260-adc
16 - atmel,at91sam9rl-adc
17 - atmel,at91sam9g45-adc
18 - atmel,at91sam9x5-adc
19 - atmel,at91sama5d3-adc
36 atmel,adc-channels-used:
40 atmel,adc-startup-time:
43 Startup Time of the ADC in microseconds as defined in the datasheet
[all …]
H A Dqcom,pm8018-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/qcom,pm8018-adc.yaml#
13 The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal
14 oscillator ADC) encompassing PM8018, PM8038, PM8058 and PM8921.
19 - qcom,pm8018-adc
20 - qcom,pm8038-adc
21 - qcom,pm8058-adc
22 - qcom,pm8921-adc
27 ADC base address in the PMIC, typically 0x197.
62 - adc
[all...]
H A Dti,am3359-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/ti,am3359-adc.yaml#
7 title: TI AM3359 ADC
16 - ti,am3359-adc
17 - ti,am4372-adc
20 - ti,am654-adc
21 - const: ti,am3359-adc
26 ti,adc-channels:
27 description: List of analog inputs available for ADC. AIN0 = 0, AIN1 = 1 and
34 description: List of open delays for each channel of ADC in the order of
35 ti,adc-channels. The value corresponds to the number of ADC clock cycles
[all …]
H A Dst,stm32-dfsdm-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
7 title: STMicroelectronics STM32 DFSDM ADC device driver
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
85 - st,stm32-dfsdm-adc
95 st,adc-channels:
97 List of single-ended channels muxed for this ADC.
99 - For st,stm32-dfsdm-adc: up to 8 channels numbered from 0 to 7.
107 st,adc-channel-names:
129 st,adc-channel-types:
141 st,adc-channel-clk-src:
[all …]
H A Dingenic,adc.yaml5 $id: http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#
8 title: Ingenic JZ47xx ADC controller IIO
14 Industrial I/O subsystem bindings for ADC controller found in
17 ADC clients must use the format described in
19 giving a phandle and IIO specifier pair ("io-channels") to the ADC controller.
24 - ingenic,jz4725b-adc
25 - ingenic,jz4740-adc
26 - ingenic,jz4760-adc
27 - ingenic,jz4760b-adc
28 - ingenic,jz4770-adc
[all …]
H A Dadi,axi-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/adi,axi-adc.yaml#
7 title: Analog Devices AXI ADC IP core
13 Analog Devices Generic AXI ADC IP core for interfacing an ADC device
17 interface for the actual ADC, while this IP core will interface
18 to the data-lines of the ADC and handle the streaming of data into
20 In some cases, the AXI ADC interface is used to perform specialized
21 operation to a particular ADC, e.g access the physical bus through
22 specific registers to write ADC registers.
37 - adi,axi-adc-10.0.a
55 adi,adc-dev:
[all …]
/linux/drivers/hwmon/
H A Dadcxx.c11 * ADC<bb><c>S<sss>, where
18 * http://www.national.com/ds/DC/ADC<bb><c>S<sss>.pdf
52 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_show() local
58 if (mutex_lock_interruptible(&adc->lock)) in adcxx_show()
61 if (adc->channels == 1) { in adcxx_show()
77 value = value * adc->reference >> 12; in adcxx_show()
80 mutex_unlock(&adc->lock); in adcxx_show()
95 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_max_show() local
98 if (mutex_lock_interruptible(&adc->lock)) in adcxx_max_show()
101 reference = adc->reference; in adcxx_max_show()
[all …]
/linux/sound/soc/codecs/
H A Drt5665.c952 SOC_DAPM_ENUM("IF1_1 01 ADC Swap Mux", rt5665_if1_1_01_adc_enum);
955 SOC_DAPM_ENUM("IF1_1 23 ADC Swap Mux", rt5665_if1_1_23_adc_enum);
958 SOC_DAPM_ENUM("IF1_1 45 ADC Swap Mux", rt5665_if1_1_45_adc_enum);
961 SOC_DAPM_ENUM("IF1_1 67 ADC Swap Mux", rt5665_if1_1_67_adc_enum);
964 SOC_DAPM_ENUM("IF1_2 01 ADC Swap Mux", rt5665_if1_2_01_adc_enum);
979 SOC_DAPM_ENUM("IF2_1 ADC Swap Source", rt5665_if2_1_adc_enum);
985 SOC_DAPM_ENUM("IF2_2 ADC Swap Source", rt5665_if2_2_adc_enum);
991 SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5665_if3_adc_enum);
1333 /* ADC Digital Volume Control */
1334 SOC_DOUBLE("STO1 ADC Captur
[all...]
H A Drt5677.c1021 /* ADC Digital Volume Control */
1030 SOC_DOUBLE("Mono ADC Capture Switch", RT5677_MONO_ADC_DIG_VOL,
1045 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5677_MONO_ADC_DIG_VOL,
1053 /* ADC Boost Volume Control */
1054 SOC_DOUBLE_TLV("STO1 ADC Boost Volume", RT5677_STO1_2_ADC_BST,
1057 SOC_DOUBLE_TLV("STO2 ADC Boost Volume", RT5677_STO1_2_ADC_BST,
1060 SOC_DOUBLE_TLV("STO3 ADC Boost Volume", RT5677_STO3_4_ADC_BST,
1063 SOC_DOUBLE_TLV("STO4 ADC Boost Volume", RT5677_STO3_4_ADC_BST,
1066 SOC_DOUBLE_TLV("Mono ADC Boost Volume", RT5677_ADC_BST_CTRL2,
1532 SOC_DAPM_SINGLE("Stereo ADC Switc
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