| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | marvell,orion-xor.yaml | 4 $id: http://devicetree.org/schemas/dma/marvell,orion-xor.yaml# 7 title: Marvell XOR engine 17 - const: marvell,armada-380-xor 18 - const: marvell,orion-xor 20 - marvell,armada-3700-xor 21 - marvell,orion-xor 25 - description: Low registers for the XOR engine 26 - description: High registers for the XOR engine 32 "^(channel|xor)[0-9]+$": 33 description: XOR channel sub-node [all …]
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| H A D | marvell,xor-v2.yaml | 4 $id: http://devicetree.org/schemas/dma/marvell,xor-v2.yaml# 7 title: Marvell XOR v2 engines 15 - const: marvell,xor-v2 18 - marvell,armada-7k-xor 19 - const: marvell,xor-v2 55 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
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| /linux/sound/pcmcia/pdaudiocf/ |
| H A D | pdaudiocf_irq.c | 41 static inline void pdacf_transfer_mono16(u16 *dst, u16 xor, unsigned int size, unsigned long rdp_po… in pdacf_transfer_mono16() argument 44 *dst++ = inw(rdp_port) ^ xor; in pdacf_transfer_mono16() 49 static inline void pdacf_transfer_mono32(u32 *dst, u32 xor, unsigned int size, unsigned long rdp_po… in pdacf_transfer_mono32() argument 57 *dst++ = ((((u32)val2 & 0xff) << 24) | ((u32)val1 << 8)) ^ xor; in pdacf_transfer_mono32() 61 static inline void pdacf_transfer_stereo16(u16 *dst, u16 xor, unsigned int size, unsigned long rdp_… in pdacf_transfer_stereo16() argument 64 *dst++ = inw(rdp_port) ^ xor; in pdacf_transfer_stereo16() 65 *dst++ = inw(rdp_port) ^ xor; in pdacf_transfer_stereo16() 69 static inline void pdacf_transfer_stereo32(u32 *dst, u32 xor, unsigned int size, unsigned long rdp_… in pdacf_transfer_stereo32() argument 77 *dst++ = ((((u32)val2 & 0xff) << 24) | ((u32)val1 << 8)) ^ xor; in pdacf_transfer_stereo32() 78 *dst++ = (((u32)val3 << 16) | (val2 & 0xff00)) ^ xor; in pdacf_transfer_stereo32() [all …]
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| /linux/lib/crypto/powerpc/ |
| H A D | sha256-spe-asm.S | 76 xor r0,r0,r0; \ 106 xor rT0,rT0,rT1; /* 1: S1 = S1 xor S1' */ \ 108 xor rT0,rT0,rT2; /* 1: S1 = S1 xor S1" */ \ 111 xor rT3,rT3,rT1; /* 1: ch = ch xor ch' */ \ 119 xor rT0,rT0,rT1; /* 1: S0 = S0 xor S0' */ \ 121 xor rT3,rT0,rT3; /* 1: S0 = S0 xor S0" */ \ 133 xor rT0,rT0,rT1; /* 2: S1 = S1 xor S1' */ \ 135 xor rT0,rT0,rT2; /* 2: S1 = S1 xor S1" */ \ 138 xor rT3,rT3,rT1; /* 2: ch = ch xor ch' */ \ 146 xor rT0,rT0,rT1; /* 2: S0 = S0 xor S0' */ \ [all …]
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| H A D | sha1-powerpc-asm.S | 58 xor r5,W((t)+4-3),W((t)+4-8); \ 60 xor W((t)+4),W((t)+4-16),W((t)+4-14); \ 62 xor W((t)+4),W((t)+4),r5; \ 67 xor r6,RB(t),RC(t); \ 70 xor r6,r6,RD(t); \ 77 xor r6,RB(t),RC(t); \ 80 xor r6,r6,RD(t); \ 82 xor r5,W((t)+4-3),W((t)+4-8); \ 84 xor W((t)+4),W((t)+4-16),W((t)+4-14); \ 86 xor W((t)+4),W((t)+4),r5; \ [all …]
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| H A D | sha1-spe-asm.S | 81 xor r0,r0,r0; \ 134 evxor w0,w0,rT0; /* W = W[-16] xor W[-3] */ \ 136 evxor w0,w0,w4; /* W = W xor W[-8] */ \ 138 evxor w0,w0,w1; /* W = W xor W[-14] */ \ 158 xor rT2,b,c; /* 1: F' = B xor C */ \ 159 evxor w0,w0,rT0; /* W = W[-16] xor W[-3] */ \ 160 xor rT2,rT2,d; /* 1: F = F' xor D */ \ 161 evxor w0,w0,w4; /* W = W xor W[-8] */ \ 163 evxor w0,w0,w1; /* W = W xor W[-14] */ \ 172 xor rT2,a,b; /* 2: F' = B xor C */ \ [all …]
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| /linux/arch/x86/crypto/ |
| H A D | twofish-i586-asm_32.S | 54 xor w+offset(context), src; 58 xor w+16+offset(context), src; 75 xor s2(%ebp,%edi,4),d ## D;\ 78 xor s3(%ebp,%edi,4),%esi;\ 80 xor s3(%ebp,%edi,4),d ## D;\ 82 xor (%ebp,%edi,4), %esi;\ 85 xor (%ebp,%edi,4), d ## D;\ 87 xor s1(%ebp,%edi,4),%esi;\ 92 xor %esi, c ## D;\ 95 xor %edi, d ## D; [all …]
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| /linux/arch/arm64/boot/dts/marvell/ |
| H A D | armada-ap810-ap0.dtsi | 71 xor@400000 { 72 compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 79 xor@420000 { 80 compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 87 xor@440000 { 88 compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 95 xor@460000 { 96 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
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| H A D | armada-ap80x.dtsi | 175 xor@400000 { 176 compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 184 xor@420000 { 185 compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 193 xor@440000 { 194 compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 202 xor@460000 { 203 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
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| /linux/lib/raid6/ |
| H A D | s390vx.uc | 5 * $#-way unrolled RAID6 gen/xor functions for s390 42 #define XOR(x, y, z) fpu_vx(x, y, z) 58 p = dptr[z0 + 1]; /* XOR parity */ 68 XOR(8+$$,8+$$,16+$$); 70 XOR(0+$$,0+$$,16+$$); 71 XOR(8+$$,8+$$,16+$$); 88 p = dptr[disks - 2]; /* XOR parity */ 102 XOR(8+$$,8+$$,16+$$); 104 XOR(0+$$,0+$$,16+$$); 105 XOR( [all...] |
| /linux/lib/crypto/x86/ |
| H A D | sha256-avx2-asm.S | 166 xor y1, y0 # y0 = (e>>25) ^ (e>>11) # S1 167 xor g, y2 # y2 = f^g # CH 172 xor y1, y0 # y0 = (e>>25) ^ (e>>11) ^ (e>>6) # S1 178 xor T1, y1 # y1 = (a>>22) ^ (a>>13) # S0 181 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH 183 xor T1, y1 # y1 = (a>>22) ^ (a>>13) ^ (a>>2) # S0 215 xor y1, y0 # y0 = (e>>25) ^ (e>>11) # S1 216 xor g, y2 # y2 = f^g # CH 220 xor y1, y0 # y0 = (e>>25) ^ (e>>11) ^ (e>>6) # S1 227 xor T1, y1 # y1 = (a>>22) ^ (a>>13) # S0 [all …]
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| H A D | sha512-avx2-asm.S | 189 xor y1, y0 # y0 = (e>>41) ^ (e>>18) # S1 190 xor g, y2 # y2 = f^g # CH 194 xor y1, y0 # y0 = (e>>41) ^ (e>>18) ^ (e>>14) # S1 199 xor T1, y1 # y1 = (a>>39) ^ (a>>34) # S0 202 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH 203 xor T1, y1 # y1 = (a>>39) ^ (a>>34) ^ (a>>28) # S0 224 # XOR the three components 252 xor y1, y0 # y0 = (e>>41) ^ (e>>18) # S1 253 xor g, y2 # y2 = f^g # CH 257 xor y1, y0 # y0 = (e>>41) ^ (e>>18) ^ (e>>14) # S1 [all …]
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| H A D | sha512-ssse3-asm.S | 119 xor g_64, T1 # T1 = f ^ g 122 xor e_64, tmp0 # tmp = (e ror 23) ^ e 123 xor g_64, T1 # T1 = ((f ^ g) & e) ^ g = CH(e,f,g) 127 xor e_64, tmp0 # tmp = (((e ror 23) ^ e) ror 4) ^ e 133 xor c_64, T2 # T2 = a ^ c 136 xor tmp0, T2 # T2 = ((a ^ c) & b) ^ (a & c) = Maj(a,b,c) 139 xor a_64, tmp0 # tmp = (a ror 5) ^ a 142 xor a_64, tmp0 # tmp = (((a ror 5) ^ a) ror 6) ^ a 172 xor g_64, T1 175 xor g_64, T1 [all …]
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| H A D | sha512-avx-asm.S | 125 xor g_64, T1 # T1 = f ^ g 128 xor e_64, tmp0 # tmp = (e ror 23) ^ e 129 xor g_64, T1 # T1 = ((f ^ g) & e) ^ g = CH(e,f,g) 133 xor e_64, tmp0 # tmp = (((e ror 23) ^ e) ror 4) ^ e 139 xor c_64, T2 # T2 = a ^ c 142 xor tmp0, T2 # T2 = ((a ^ c) & b) ^ (a & c) = Maj(a,b,c) 145 xor a_64, tmp0 # tmp = (a ror 5) ^ a 148 xor a_64, tmp0 # tmp = (((a ror 5) ^ a) ror 6) ^ a 179 xor g_64, T1 183 xor e_64, tmp0 [all …]
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| H A D | sha256-avx-asm.S | 162 xor e, y0 # y0 = e ^ (e >> (25-11)) 165 xor a, y1 # y1 = a ^ (a >> (22-13) 166 xor g, y2 # y2 = f^g 168 xor e, y0 # y0 = e ^ (e >> (11-6)) ^ (e >> (25-6)) 173 xor a, y1 # y1 = a ^ (a >> (13-2)) ^ (a >> (22-2)) 175 xor g, y2 # y2 = CH = ((f^g)&e)^g 196 xor e, y0 # y0 = e ^ (e >> (25-11)) 200 xor a, y1 # y1 = a ^ (a >> (22-13) 202 xor g, y2 # y2 = f^g 205 xor e, y0 # y0 = e ^ (e >> (11-6)) ^ (e >> (25-6)) [all …]
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| H A D | sha256-ssse3-asm.S | 156 xor e, y0 # y0 = e ^ (e >> (25-11)) 160 xor a, y1 # y1 = a ^ (a >> (22-13) 161 xor g, y2 # y2 = f^g 163 xor e, y0 # y0 = e ^ (e >> (11-6)) ^ (e >> (25-6)) 168 xor a, y1 # y1 = a ^ (a >> (13-2)) ^ (a >> (22-2)) 170 xor g, y2 # y2 = CH = ((f^g)&e)^g 196 xor e, y0 # y0 = e ^ (e >> (25-11)) 200 xor a, y1 # y1 = a ^ (a >> (22-13) 202 xor g, y2 # y2 = f^g 205 xor e, y0 # y0 = e ^ (e >> (11-6)) ^ (e >> (25-6)) [all …]
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| /linux/arch/x86/kvm/vmx/ |
| H A D | vmenter.S | 96 xor %eax, %ecx 99 xor %edx, %edi 209 xor %ebx, %ebx 225 xor %eax, %eax 226 xor %ecx, %ecx 227 xor %edx, %edx 228 xor %ebp, %ebp 229 xor %esi, %esi 230 xor %edi, %edi 232 xor %r8d, %r8d [all …]
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| /linux/Documentation/devicetree/bindings/powerpc/4xx/ |
| H A D | ppc440spe-adma.txt | 1 PPC440SPe DMA/XOR (DMA Controller and XOR Accelerator) 4 are specified hereby. These are I2O/DMA, DMA and XOR nodes 60 iii) XOR Accelerator node 64 - compatible : "amcc,xor-accelerator"; 66 - interrupts : <interrupt mapping for XOR interrupt source> 70 xor-accel@400200000 { 71 compatible = "amcc,xor-accelerator";
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| /linux/arch/powerpc/kernel/vdso/ |
| H A D | vgetrandom-chacha.S | 57 xor \d1, \d1, \a1 58 xor \d2, \d2, \a2 59 xor \d3, \d3, \a3 60 xor \d4, \d4, \a4 69 xor \b1, \b1, \c1 70 xor \b2, \b2, \c2 71 xor \b3, \b3, \c3 72 xor \b4, \b4, \c4 81 xor \d1, \d1, \a1 82 xor \d2, \d2, \a2 [all …]
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| /linux/net/can/ |
| H A D | gw.c | 90 struct canfd_frame xor; member 96 u8 xor; member 104 struct cgw_csum_xor xor; member 108 void (*xor)(struct canfd_frame *cf, member 109 struct cgw_csum_xor *xor); 165 MODFUNC(mod_xor_id, cf->can_id ^= mod->modframe.xor.can_id) 166 MODFUNC(mod_xor_len, cf->len ^= mod->modframe.xor.len) 167 MODFUNC(mod_xor_flags, cf->flags ^= mod->modframe.xor.flags) 168 MODFUNC(mod_xor_data, *(u64 *)cf->data ^= *(u64 *)mod->modframe.xor.data) 195 *(u64 *)(cf->data + i) ^= *(u64 *)(mod->modframe.xor.data + i); in mod_xor_fddata() [all …]
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| /linux/include/uapi/linux/can/ |
| H A D | gw.h | 71 CGW_MOD_XOR, /* CAN frame modification binary XOR */ 73 CGW_CS_XOR, /* set data[] XOR checksum into data[index] */ 85 CGW_FDMOD_XOR, /* CAN FD frame modification binary XOR */ 97 #define CGW_MOD_FUNCS 4 /* AND OR XOR SET */ 167 * CGW_MOD_(AND|OR|XOR|SET) (length 17 bytes): 185 * Set a simple XOR checksum starting with an initial value into 188 * The XOR checksum is calculated like this: 190 * xor = init_xor_val 193 * xor ^= can_frame.data[i] 195 * can_frame.data[ result_idx ] = xor [all …]
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| /linux/tools/testing/selftests/bpf/verifier/ |
| H A D | ld_dw.c | 2 "ld_dw: xor semi-random 64 bit imms, test 1", 11 "ld_dw: xor semi-random 64 bit imms, test 2", 20 "ld_dw: xor semi-random 64 bit imms, test 3", 29 "ld_dw: xor semi-random 64 bit imms, test 4", 38 "ld_dw: xor semi-random 64 bit imms, test 5",
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| /linux/drivers/dma/ppc4xx/ |
| H A D | xor.h | 3 * 440SPe's XOR engines support header file 15 /* Number of XOR engines available on the contoller */ 22 * XOR Command Block Control Register bits 28 #define XOR_CBCR_XNOR_BIT (1<<15) /* XOR/XNOR */ 62 * XOR Accelerator engine Command Block Type 66 * Basic 64-bit format XOR CB (Table 19-1, p.463, 440spe_um_1_22.pdf) 83 * XOR hardware registers Table 19-3, UM 1.22
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| /linux/Documentation/crypto/ |
| H A D | async-tx-api.rst | 43 xor-parity-calculations of the md-raid5 driver using the offload engines 54 operations to be submitted, like xor->copy->xor in the raid5 case. The 77 xor xor a series of source buffers and write the result to a 79 xor_val xor a series of source buffers and set a flag if the 150 Perform a xor->copy->xor operation where each operation depends on the 270 xor and xor zero sum offload
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| /linux/lib/crc/ |
| H A D | crc32-main.c | 17 * Some xor at the end with ~0. The generic crc32() function takes 18 * seed as an argument, and doesn't xor at the end. Then individual 20 * drivers/net/smc9194.c uses seed ~0, doesn't xor with ~0. 21 * fs/jffs2 uses seed 0, doesn't xor with ~0. 22 * fs/partitions/efi.c uses seed ~0, xor's with ~0.
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