Searched full:ref_sel (Results 1 – 5 of 5) sorted by relevance
224 u8 ref_sel;672 u8 ref_sel; in ad7173_is_setup_equal()680 cfg1->ref_sel == cfg2->ref_sel && in ad7173_is_setup_equal()730 config = FIELD_PREP(AD7173_SETUP_REF_SEL_MASK, cfg->ref_sel); in ad7173_load_config()1282 *val = ad7173_get_ref_voltage_milli(st, ch->cfg.ref_sel); in ad7173_read_raw()1289 *val = ad7173_get_ref_voltage_milli(st, ch->cfg.ref_sel); in ad7173_read_raw()1726 static int ad7173_validate_reference(struct ad7173_state *st, int ref_sel) in ad7173_validate_reference() argument1731 if (ref_sel == AD7173_SETUP_REF_SEL_INT_REF && !st->info->has_int_ref) in ad7173_validate_reference()1735 if (ref_sel == AD7173_SETUP_REF_SEL_EXT_REF2 && !st->info->has_ref2) in ad7173_validate_reference()1739 ret = ad7173_get_ref_voltage_milli(st, ref_sel); in ad7173_validate_reference()[all …]
65 that clock signal is always available, its rate is specified by REF_SEL75 Frequency of the REFCLK signal as defined by REF_SEL pins. If not
144 u8 ref_sel; member
52 PDEBUG("reg0 CFG1 ref_sel %d hibernate %d rf_vco_reg_en %d"
271 ts->stmpe->ref_sel = val; in stmpe_ts_get_platform_info()