/linux/Documentation/devicetree/bindings/gpio/ |
H A D | loongson,ls-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/loongson,ls-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson GPIO controller. 10 - Yinbo Zhu <zhuyinbo@loongson.cn> 15 - enum: 16 - loongson,ls2k-gpio 17 - loongson,ls2k0500-gpio0 18 - loongson,ls2k0500-gpio1 [all …]
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/linux/Documentation/devicetree/bindings/rtc/ |
H A D | loongson,rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/rtc/loongson,rtc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson Real-Time Clock 10 The Loongson family chips use an on-chip counter 0 (Time Of Year 14 - Binbin Zhou <zhoubinbin@loongson.cn> 17 - $ref: rtc.yaml# 22 - enum: 23 - loongson,ls1b-rtc [all …]
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/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | loongson,liointc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson Local I/O Interrupt Controller 10 - Jiaxun Yang <jiaxun.yang@flygoat.com> 13 This interrupt controller is found in the Loongson-3 family of chips and 14 Loongson-2K series chips, as the primary package interrupt controller which 17 1.The Loongson-2K0500 is a single core CPU; 18 2.The Loongson-2K0500/2K1000 has 64 device interrupt sources as inputs, so we [all …]
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H A D | loongson,pch-msi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson PCH MSI Controller 10 - Jiaxun Yang <jiaxun.yang@flygoat.com> 13 This interrupt controller is found in the Loongson LS7A family of PCH for 19 const: loongson,pch-msi-1.0 22 maxItems: 1 24 loongson,msi-base-vec: [all …]
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H A D | loongson,eiointc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson Extended I/O Interrupt Controller 10 - Binbin Zhou <zhoubinbin@loongson.cn> 13 This interrupt controller is found on the Loongson-3 family chips and 14 Loongson-2K series chips and is used to distribute interrupts directly to 18 - $ref: /schemas/interrupt-controller.yaml# 23 - loongson,ls2k0500-eiointc [all …]
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H A D | loongson,pch-pic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson PCH PIC Controller 10 - Jiaxun Yang <jiaxun.yang@flygoat.com> 13 This interrupt controller is found in the Loongson LS7A family of PCH for 14 transforming interrupts from on-chip devices into HyperTransport vectorized 19 const: loongson,pch-pic-1.0 22 maxItems: 1 [all …]
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/linux/Documentation/devicetree/bindings/thermal/ |
H A D | loongson,ls2k-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/loongson,ls2k-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Thermal sensors on Loongson-2 SoCs 10 - zhanghongchen <zhanghongchen@loongson.cn> 11 - Yinbo Zhu <zhuyinbo@loongson.cn> 14 - $ref: /schemas/thermal/thermal-sensor.yaml# 19 - enum: 20 - loongson,ls2k1000-thermal [all …]
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | loongson,ls2k-clk.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/loongson,ls2k-clk.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-2 SoC Clock Control Module 10 - Yinbo Zhu <zhuyinbo@loongson.cn> 13 Loongson-2 SoC clock control module is an integrated clock controller, which 19 - loongson,ls2k0500-clk 20 - loongson,ls2k-clk # This is for Loongson-2K1000 21 - loongson,ls2k2000-clk [all …]
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H A D | loongson,ls1x-clk.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/loongson,ls1x-clk.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-1 Clock Controller 10 - Keguang Zhang <keguang.zhang@gmail.com> 15 - loongson,ls1b-clk 16 - loongson,ls1c-clk 19 maxItems: 1 22 maxItems: 1 [all …]
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/linux/Documentation/devicetree/bindings/soc/loongson/ |
H A D | loongson,ls2k-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/loongson/loongson,ls2k-pmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-2 Power Manager controller 10 - Yinbo Zhu <zhuyinbo@loongson.cn> 15 - items: 16 - const: loongson,ls2k0500-pmc 17 - const: syscon 18 - items: [all …]
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/linux/Documentation/devicetree/bindings/dma/ |
H A D | loongson,ls2x-apbdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/loongson,ls2x-apbdma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson LS2X APB DMA controller 10 The Loongson LS2X APB DMA controller is used for transferring data 14 - Binbin Zhou <zhoubinbin@loongson.cn> 17 - $ref: dma-controller.yaml# 22 - const: loongson,ls2k1000-apbdma 23 - items: [all …]
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H A D | loongson,ls1b-apbdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/loongson,ls1b-apbdma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-1 APB DMA Controller 10 - Keguang Zhang <keguang.zhang@gmail.com> 13 Loongson-1 APB DMA controller provides 3 independent channels for 19 - const: loongson,ls1b-apbdma 20 - items: 21 - enum: [all …]
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/linux/Documentation/devicetree/bindings/mips/loongson/ |
H A D | devices.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mips/loongson/devices.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson based Platforms 10 - Jiaxun Yang <jiaxun.yang@flygoat.com> 12 Devices with a Loongson CPU shall have the following properties. 20 - description: Classic Loongson64 Quad Core + LS7A 22 - const: loongson,loongson64c-4core-ls7a 24 - description: Classic Loongson64 Quad Core + RS780E [all …]
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H A D | ls2k-reset.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mips/loongson/ls2k-reset.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson 2K1000 PM Controller 10 - Qing Zhang <zhangqing@loongson.cn> 13 This controller can be found in Loongson-2K1000 Soc systems. 17 const: loongson,ls2k-pm 20 maxItems: 1 23 - compatible [all …]
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/linux/Documentation/devicetree/bindings/net/ |
H A D | loongson,ls1b-gmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/loongson,ls1b-gmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-1B Gigabit Ethernet MAC Controller 10 - Keguang Zhang <keguang.zhang@gmail.com> 13 Loongson-1B Gigabit Ethernet MAC Controller is based on 17 - Dual 10/100/1000Mbps GMAC controllers 18 - Full-duplex operation (IEEE 802.3x flow control automatic transmission) 19 - Half-duplex operation (CSMA/CD Protocol and back-pressure support) [all …]
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H A D | loongson,ls1c-emac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/loongson,ls1c-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-1C Ethernet MAC Controller 10 - Keguang Zhang <keguang.zhang@gmail.com> 13 Loongson-1C Ethernet MAC Controller is based on 17 - 10/100Mbps 18 - Full-duplex operation (IEEE 802.3x flow control automatic transmission) 19 - Half-duplex operation (CSMA/CD Protocol and back-pressure support) [all …]
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | loongson,ls2k-spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/loongson,ls2k-spi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson SPI controller 10 - Yinbo Zhu <zhuyinbo@loongson.cn> 13 - $ref: /schemas/spi/spi-controller.yaml# 18 - enum: 19 - loongson,ls2k1000-spi 20 - items: [all …]
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/linux/Documentation/devicetree/bindings/sound/ |
H A D | loongson,ls-audio-card.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/loongson,ls-audio-card.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson 7axxx/2kxxx ASoC audio sound card driver 10 - Yingkun Meng <mengyingkun@loongson.cn> 13 The binding describes the sound card present in loongson 15 which uses Loongson I2S controller to transfer the audio data. 19 const: loongson,ls-audio-card 25 mclk-fs: [all …]
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/linux/Documentation/devicetree/bindings/watchdog/ |
H A D | loongson,ls1x-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/watchdog/loongson,ls1x-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-1 Watchdog Timer 10 - Keguang Zhang <keguang.zhang@gmail.com> 13 - $ref: watchdog.yaml# 18 - loongson,ls1b-wdt 19 - loongson,ls1c-wdt 22 maxItems: 1 [all …]
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/linux/Documentation/devicetree/bindings/timer/ |
H A D | loongson,ls1x-pwmtimer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/loongson,ls1x-pwmtimer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-1 PWM timer 10 - Keguang Zhang <keguang.zhang@gmail.com> 13 Loongson-1 PWM timer can be used for system clock source 18 const: loongson,ls1b-pwmtimer 21 maxItems: 1 24 maxItems: 1 [all …]
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/linux/Documentation/devicetree/bindings/loongarch/ |
H A D | cpus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Binbin Zhou <zhoubinbin@loongson.cn> 17 - $ref: /schemas/cpu.yaml# 22 - loongson,la264 23 - loongson,la364 26 maxItems: 1 29 maxItems: 1 32 - compatible [all …]
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/linux/Documentation/devicetree/bindings/i2c/ |
H A D | loongson,ls2x-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/loongson,ls2x-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson LS2X I2C Controller 10 - Binbin Zhou <zhoubinbin@loongson.cn> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 18 - loongson,ls2k-i2c 19 - loongson,ls7a-i2c 22 maxItems: 1 [all …]
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/linux/drivers/pci/controller/ |
H A D | pci-loongson.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Loongson PCI Host Controller Driver 12 #include <linux/pci-acpi.h> 13 #include <linux/pci-ecam.h> 39 #define FLAG_CFG1 BIT(1) 58 dev->class = PCI_CLASS_BRIDGE_PCI_NORMAL; in bridge_class_quirk() 73 pdev->mmio_always_on = 1; in system_bus_quirk() 74 pdev->non_compliant_bars = 1; in system_bus_quirk() 84 * Some Loongson PCIe ports have hardware limitations on their Maximum Read 87 * bridges. However, some MIPS Loongson firmware doesn't set MRRS properly, [all …]
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/linux/Documentation/devicetree/bindings/hwinfo/ |
H A D | loongson,ls2k-chipid.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/hwinfo/loongson,ls2k-chipid.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-2 SoC ChipID 10 - Yinbo Zhu <zhuyinbo@loongson.cn> 13 Loongson-2 SoC contains many groups of global utilities register 19 const: loongson,ls2k-chipid 22 maxItems: 1 24 little-endian: true [all …]
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/linux/Documentation/arch/loongarch/ |
H A D | introduction.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. There are 8 currently 3 variants: a reduced 32-bit version (LA32R), a standard 32-bit 9 version (LA32S) and a 64-bit version (LA64). There are 4 privilege levels 22 ---- 24 LoongArch has 32 GPRs ( ``$r0`` ~ ``$r31`` ); each one is 32-bit wide in LA32 25 and 64-bit wide in LA64. ``$r0`` is hard-wired to zero, and the other registers 26 are not architecturally special. (Except ``$r1``, which is hard-wired as the 30 the LoongArch ELF psABI spec, in :ref:`References <loongarch-references>`: 40 ``$r4``-``$r11`` ``$a0``-``$a7`` Argument registers No [all …]
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