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Searched full:gpu_cc_cx_gmu_clk (Results 1 – 25 of 47) sorted by relevance

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/linux/drivers/clk/qcom/
H A Dgpucc-sdm845.c88 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
95 .name = "gpu_cc_cx_gmu_clk",
143 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
187 * Configure gpu_cc_cx_gmu_clk with recommended in gpu_cc_sdm845_probe()
H A Dgpucc-sm6125.c233 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
240 .name = "gpu_cc_cx_gmu_clk",
353 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
405 /* Set recommended WAKEUP/SLEEP settings for the gpu_cc_cx_gmu_clk */ in gpu_cc_sm6125_probe()
406 qcom_branch_set_wakeup(regmap, gpu_cc_cx_gmu_clk, 0xf); in gpu_cc_sm6125_probe()
407 qcom_branch_set_sleep(regmap, gpu_cc_cx_gmu_clk, 0xf); in gpu_cc_sm6125_probe()
H A Dgpucc-sc7180.c101 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
108 .name = "gpu_cc_cx_gmu_clk",
188 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
238 /* Recommended WAKEUP/SLEEP settings for the gpu_cc_cx_gmu_clk */ in gpu_cc_sc7180_probe()
H A Dgpucc-sm6115.c282 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
289 .name = "gpu_cc_cx_gmu_clk",
424 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
484 /* Set recommended WAKEUP/SLEEP settings for the gpu_cc_cx_gmu_clk */ in gpu_cc_sm6115_probe()
485 qcom_branch_set_wakeup(regmap, gpu_cc_cx_gmu_clk, 0xf); in gpu_cc_sm6115_probe()
486 qcom_branch_set_sleep(regmap, gpu_cc_cx_gmu_clk, 0xf); in gpu_cc_sm6115_probe()
H A Dgpucc-sm8250.c142 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
149 .name = "gpu_cc_cx_gmu_clk",
255 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
315 * Configure gpu_cc_cx_gmu_clk with recommended in gpu_cc_sm8250_probe()
H A Dgpucc-sm8150.c147 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
154 .name = "gpu_cc_cx_gmu_clk",
247 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sm6350.c293 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
300 .name = "gpu_cc_cx_gmu_clk",
444 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
499 /* Configure gpu_cc_cx_gmu_clk with recommended wakeup/sleep settings */ in gpu_cc_sm6350_probe()
H A Dgpucc-qcm2290.c196 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
203 .name = "gpu_cc_cx_gmu_clk",
324 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sc8280xp.c240 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
247 .name = "gpu_cc_cx_gmu_clk",
367 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sc7280.c218 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
225 .name = "gpu_cc_cx_gmu_clk",
416 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sar2130p.c256 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
263 .name = "gpu_cc_cx_gmu_clk",
423 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sa8775p.c338 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
345 .name = "gpu_cc_cx_gmu_clk",
503 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sm8550.c321 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
328 .name = "gpu_cc_cx_gmu_clk",
507 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sm8650.c296 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
303 .name = "gpu_cc_cx_gmu_clk",
573 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-x1e80100.c311 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
318 .name = "gpu_cc_cx_gmu_clk",
564 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
H A Dgpucc-sm8350.c269 static struct clk_branch gpu_cc_cx_gmu_clk = { variable
276 .name = "gpu_cc_cx_gmu_clk",
536 [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr,
/linux/include/dt-bindings/clock/
H A Dqcom,gpucc-sc7180.h12 #define GPU_CC_CX_GMU_CLK 3 macro
H A Dqcom,gpucc-sdm845.h10 #define GPU_CC_CX_GMU_CLK 0 macro
H A Dqcom,gpucc-sm8150.h13 #define GPU_CC_CX_GMU_CLK 3 macro
H A Dqcom,sm6125-gpucc.h16 #define GPU_CC_CX_GMU_CLK 5 macro
H A Dqcom,gpucc-sm8250.h13 #define GPU_CC_CX_GMU_CLK 3 macro
H A Dqcom,qcm2290-gpucc.h14 #define GPU_CC_CX_GMU_CLK 3 macro
H A Dqcom,gpucc-sc8280xp.h15 #define GPU_CC_CX_GMU_CLK 5 macro
H A Dqcom,gpucc-sc7280.h15 #define GPU_CC_CX_GMU_CLK 5 macro
H A Dqcom,sar2130p-gpucc.h14 #define GPU_CC_CX_GMU_CLK 3 macro

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