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/linux/drivers/platform/x86/siemens/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 will be called simatic-ipc.
27 will be called simatic-ipc-batt.
30 tristate "CMOS Battery monitoring for Simatic IPCs based on Apollo Lake GPIO"
36 from Siemens based on Apollo Lake GPIO.
39 will be called simatic-ipc-batt-apollolake.
42 tristate "CMOS Battery monitoring for Simatic IPCs based on Elkhart Lake GPIO"
48 from Siemens based on Elkhart Lake GPIO.
51 will be called simatic-ipc-batt-elkhartlake.
54 tristate "CMOS Battery monitoring for Simatic IPCs based on Nuvoton GPIO"
[all …]
/linux/drivers/i2c/muxes/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
10 tristate "GPIO-based I2C arbitration"
17 a GPIO.
20 will be called i2c-arb-gpio-challenge.
23 tristate "GPIO-based I2C multiplexer"
27 GPIO based I2C multiplexer. This driver provides access to
29 through GPIO pins.
32 will be called i2c-mux-gpio.
42 by a MUX-controller from the MUX subsystem.
45 will be called i2c-mux-gpmux.
[all …]
/linux/drivers/fsi/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 FSI - the FRU Support Interface - is a simple bus for low-level
12 access to POWER-based hardware.
29 symlinks in /dev/fsi/by-path when this option is enabled.
32 tristate "GPIO-based FSI master"
36 This option enables a FSI master driver using GPIO lines.
47 tristate "FSI master based on Aspeed ColdFire coprocessor"
52 This option enables a FSI master using the AST2400 and AST2500 GPIO
77 This option enables an FSI based SCOM device driver.
83 This option enables an FSI based SBEFIFO device driver. The SBEFIFO is
[all …]
/linux/drivers/extcon/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 host USB ports. Many of 30-pin connectors including PDMI are
22 Say Y here to enable extcon device driver based on ADC values.
25 tristate "X-Power AXP288 EXTCON support"
30 and USB MUX switching by X-Power AXP288 PMIC.
45 tristate "GPIO extcon support"
48 Say Y here to enable GPIO based extcon support. Note that GPIO
59 based tablets, or other Baytrail / Cherrytrail devices.
105 enable a system with an integrated USB OTG dual-role transceiver to
106 function as an USB OTG dual-role device.
[all …]
/linux/drivers/input/misc/
H A Dgpio-vibra.c1 // SPDX-License-Identifier: GPL-2.0+
3 * GPIO vibrator driver
7 * Based on PWM vibrator driver:
10 * Based on previous work from:
13 * Based on PWM beeper driver:
14 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
17 #include <linux/gpio/consumer.h>
29 struct gpio_desc *gpio; member
39 struct device *pdev = vibrator->input->dev.parent; in gpio_vibrator_start()
42 if (!vibrator->vcc_on) { in gpio_vibrator_start()
[all …]
/linux/drivers/usb/common/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
13 Say Y here if you are working on a system with led-class supported
39 tristate "USB GPIO Based Connection Detection Driver"
44 The driver supports USB role switch between host and device via GPIO
45 based USB cable detection, used typically if an input GPIO is used
46 to detect USB ID pin, and another input GPIO may be also used to detect
48 device if an input GPIO is only used to detect Vbus pin.
51 be called usb-conn-gpio.ko
/linux/Documentation/dev-tools/
H A Dgpio-sloppy-logic-analyzer.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Linux Kernel GPIO based sloppy logic analyzer
12 This document briefly describes how to run the GPIO based in-kernel sloppy
15 The sloppy logic analyzer will utilize a few GPIO lines in input mode on a
19 connected to these GPIO lines with wires (i.e. digital probes), acting as a
22 Another feature is to snoop on on-chip peripherals if the I/O cells of these
23 peripherals can be used in GPIO input mode at the same time as they are being
26 control subsystem such pin controllers are called "non-strict": a certain pin
27 can be used with a certain peripheral and as a GPIO input line at the same
31 non-deterministic code paths and non-maskable interrupts. It is called 'sloppy'
[all …]
/linux/arch/arm/mach-s3c/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
5 source "arch/arm/mach-s3c/Kconfig.s3c64xx"
13 Base platform code for all Samsung SoC based systems
29 int "S3C UART to use for low-level messages"
33 Choice of which UART port to use for the low-level messages,
36 must have been initialised by the boot-loader before use.
42 This option enables ATAGS based boot support code for
46 Platforms that support only DT based boot need not to select
52 int "Space between gpio banks"
55 Add a number of spare GPIO entries between each bank for debugging
[all …]
/linux/drivers/gpio/
H A Dgpio-ich.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver
9 #include <linux/gpio/driver.h>
18 * GPIO register offsets in GPIO I/O space.
22 * number in that register. For example, to read the value of GPIO bit 50
34 {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */
35 {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */
36 {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */
54 #define ICHX_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start)
55 #define ICHX_READ(reg, base_res) inl((reg) + (base_res)->start)
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dqcom,qca807x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christian Marangi <ansuelsmth@gmail.com>
11 - Robert Marko <robert.marko@sartura.hr>
15 IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and
16 1000BASE-T PHY-s.
21 Both models have a combo port that supports 1000BASE-X and
22 100BASE-FX fiber.
25 output only pins that natively drive LED-s for up to 2 attached
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos4412-itop-elite.dts1 // SPDX-License-Identifier: GPL-2.0
3 * TOPEET's Exynos4412 based itop board device tree source
10 * which is based on Samsung's Exynos4412 SoC.
13 /dts-v1/;
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pwm/pwm.h>
16 #include <dt-bindings/sound/samsung-i2s.h>
17 #include "exynos4412-itop-scp-core.dtsi"
20 model = "TOPEET iTop 4412 Elite board based on Exynos4412";
21 compatible = "topeet,itop4412-elite", "samsung,exynos4412", "samsung,exynos4";
[all …]
H A Ds3c6410-mini6410.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S3C6410 based Mini6410 board device tree source
7 * Device tree source file for FriendlyARM Mini6410 board which is based on
11 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
19 model = "FriendlyARM Mini6410 board based on S3C6410";
31 fin_pll: oscillator-0 {
32 compatible = "fixed-clock";
33 clock-frequency = <12000000>;
[all …]
H A Dexynos4412-tiny4412.dts1 // SPDX-License-Identifier: GPL-2.0
3 * FriendlyARM's Exynos4412 based TINY4412 board device tree source
7 * Device tree source file for FriendlyARM's TINY4412 board which is based on
11 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
17 model = "FriendlyARM TINY4412 board based on Exynos4412";
25 stdout-path = &serial_0;
34 compatible = "gpio-leds";
40 default-state = "off";
[all …]
H A Ds3c6410-smdk6410.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung S3C6410 based SMDK6410 board device tree source.
7 * Device tree source file for Samsung SMDK6410 board which is based on
11 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
19 model = "Samsung SMDK6410 board based on S3C6410";
31 fin_pll: oscillator-0 {
32 compatible = "fixed-clock";
33 clock-frequency = <12000000>;
[all …]
/linux/Documentation/devicetree/bindings/power/supply/
H A Dbq24257.yaml1 # SPDX-License-Identifier: GPL-2.0
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Bq24250, bq24251 and bq24257 Li-Ion Charger
11 - Sebastian Reichel <sre@kernel.org>
14 - $ref: power-supply.yaml#
19 - ti,bq24250
20 - ti,bq24251
21 - ti,bq24257
29 ti,battery-regulation-voltage:
[all …]
/linux/Documentation/devicetree/bindings/auxdisplay/
H A Dgpio-7-segment.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/auxdisplay/gpio-7-segment.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO based LED segment display
10 - Chris Packham <chris.packham@alliedtelesis.co.nz>
14 const: gpio-7-segment
16 segment-gpios:
18 An array of GPIOs one per segment. The first GPIO corresponds to the A
19 segment, the seventh GPIO corresponds to the G segment. Some LED blocks
[all …]
/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp42x-goramo-multilink.dts1 // SPDX-License-Identifier: ISC
5 * - MultiLink Basic (a box)
6 * - MultiLink Max (19" rack mount)
8 * This machine is based on IXP425.
9 * This is one of the few devices supporting the IXP4xx High-Speed Serial
14 /dts-v1/;
16 #include "intel-ixp42x.dtsi"
17 #include <dt-bindings/input/input.h>
21 compatible = "goramo,multilink-router", "intel,ixp42x";
22 #address-cells = <1>;
[all …]
/linux/Documentation/devicetree/bindings/serio/
H A Dps2-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serio/ps2-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO based PS/2
10 - Danilo Krummrich <danilokrummrich@dk-develop.de>
14 const: ps2-gpio
16 data-gpios:
18 the gpio used for the data signal - this should be flagged as
20 from <dt-bindings/gpio/gpio.h> since the signal is open drain by
[all …]
/linux/Documentation/driver-api/gpio/
H A Dbt8xxgpio.rst2 A driver for a selfmade cheap BT8xx based PCI GPIO-card (bt8xxgpio)
7 A generic digital 24-port PCI GPIO card can be built out of an ordinary
8 Brooktree bt848, bt849, bt878 or bt879 based analog TV tuner card. The
12 The bt8xx chip does have 24 digital GPIO ports.
16 How to physically access the GPIO pins
21 GPIO pin and solder that to some tiny wire. As the chip package really is tiny
25 The GPIO pins are marked with G00-G23::
31 ---------------------------------------------------------------------------
32 --| ^ ^ |--
33 --| pin 86 pin 67 |--
[all …]
H A Dconsumer.rst2 GPIO Descriptor Consumer Interface
5 This document describes the consumer interface of the GPIO framework.
11 Drivers that can't work without standard GPIO calls should have Kconfig entries
15 #include <linux/gpio/consumer.h>
21 - Simple compile coverage with e.g. COMPILE_TEST - it does not matter that
25 - Truly optional GPIOLIB support - where the driver does not really make use
26 of the GPIOs on certain compile-time configurations for certain systems, but
27 will use it under other compile-time configurations. In this case the
35 All the functions that work with the descriptor-based GPIO interface are
39 <linux/gpio/consumer.h> and descriptors exclusively.
[all …]
/linux/Documentation/ABI/testing/
H A Dgpio-cdev1 What: /dev/gpiochip[0-9]+
4 Contact: linux-gpio@vger.kernel.org
7 between GPIO chips and userspace.
9 The ioctl(2)-based ABI is defined in
10 [include/uapi]<linux/gpio.h> and documented in
11 Documentation/userspace-api/gpio/chardev.rst.
21 See Documentation/userspace-api/gpio/chardev.rst
/linux/arch/arm/boot/dts/marvell/
H A Darmada-385-linksys.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree include file for Armada 385 based Linksys boards
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "armada-385.dtsi"
13 model = "Linksys boards based on Armada 385";
18 stdout-path = "serial0:115200n8";
34 usb3_1_phy: usb3_1-phy {
35 compatible = "usb-nop-xceiv";
36 vcc-supply = <&usb3_1_vbus>;
[all …]
/linux/Documentation/devicetree/bindings/
H A Dcommon-properties.txt5 ----------
13 - big-endian: Boolean; force big endian register accesses
16 - little-endian: Boolean; force little endian register accesses
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22 will ever be performed. Use this if the hardware "self-adjusts"
23 register endianness based on the CPU's configured endianness.
27 In such cases, little-endian is the preferred default, but it is not
28 a requirement. Some implementations assume that little-endian is
[all …]
/linux/include/linux/regulator/
H A Dgpio-regulator.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * gpio-regulator.h
7 * based on fixed.h
14 * Roger Quadros <ext-roger.quadros@nokia.com>
20 #include <linux/gpio/consumer.h>
27 * struct gpio_regulator_state - state description
29 * @gpios: bitfield of gpio target-states for the value
32 * and the necessary gpio-state to achieve it.
34 * The n-th bit in the bitfield describes the state of the n-th GPIO
35 * from the gpios-array defined in gpio_regulator_config below.
[all …]
/linux/Documentation/devicetree/bindings/media/
H A Dgpio-ir-receiver.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/media/gpio-ir-receiver.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO Based IR receiver
10 - Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
13 - $ref: rc.yaml#
17 const: gpio-ir-receiver
22 linux,autosuspend-period:
26 wakeup-source:
[all …]

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