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Searched full:gcc_disp_gpll0_div_clk_src (Results 1 – 25 of 27) sorted by relevance

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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,qcm2290-dispcc.yaml36 - const: gcc_disp_gpll0_div_clk_src
62 <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
68 "gcc_disp_gpll0_div_clk_src",
H A Dqcom,sdm845-dispcc.yaml41 - const: gcc_disp_gpll0_div_clk_src
69 <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
78 "gcc_disp_gpll0_div_clk_src",
H A Dqcom,dispcc-sm6125.yaml43 - const: gcc_disp_gpll0_div_clk_src
90 <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>;
98 "gcc_disp_gpll0_div_clk_src";
H A Dqcom,sm6115-dispcc.yaml52 <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>;
/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sc7180.h35 #define GCC_DISP_GPLL0_DIV_CLK_SRC 25 macro
H A Dqcom,sm7150-gcc.h35 #define GCC_DISP_GPLL0_DIV_CLK_SRC 23 macro
H A Dqcom,gcc-qcm2290.h83 #define GCC_DISP_GPLL0_DIV_CLK_SRC 73 macro
H A Dqcom,gcc-sm6115.h70 #define GCC_DISP_GPLL0_DIV_CLK_SRC 62 macro
H A Dqcom,sm6375-gcc.h96 #define GCC_DISP_GPLL0_DIV_CLK_SRC 85 macro
H A Dqcom,gcc-sm6125.h112 #define GCC_DISP_GPLL0_DIV_CLK_SRC 103 macro
H A Dqcom,gcc-sdm845.h32 #define GCC_DISP_GPLL0_DIV_CLK_SRC 22 macro
/linux/drivers/clk/qcom/
H A Ddispcc-sm6125.c101 { .fw_name = "gcc_disp_gpll0_div_clk_src" },
111 { .fw_name = "gcc_disp_gpll0_div_clk_src" },
H A Ddispcc-sdm845.c93 { .fw_name = "gcc_disp_gpll0_div_clk_src", .name = "gcc_disp_gpll0_div_clk_src" },
H A Dgcc-sdm845.c1489 static struct clk_branch gcc_disp_gpll0_div_clk_src = { variable
1495 .name = "gcc_disp_gpll0_div_clk_src",
3547 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
3700 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
H A Dgcc-sc7180.c1027 static struct clk_branch gcc_disp_gpll0_div_clk_src = { variable
1033 .name = "gcc_disp_gpll0_div_clk_src",
2261 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
H A Ddispcc-qcm2290.c93 { .fw_name = "gcc_disp_gpll0_div_clk_src" },
H A Dgcc-qcm2290.c1856 static struct clk_branch gcc_disp_gpll0_div_clk_src = { variable
1862 .name = "gcc_disp_gpll0_div_clk_src",
2821 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
H A Dgcc-sm7150.c1223 static struct clk_branch gcc_disp_gpll0_div_clk_src = { variable
1229 .name = "gcc_disp_gpll0_div_clk_src",
2775 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
H A Dgcc-sm6115.c2171 static struct clk_branch gcc_disp_gpll0_div_clk_src = { variable
2177 .name = "gcc_disp_gpll0_div_clk_src",
3328 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
H A Dgcc-sm6375.c2342 static struct clk_branch gcc_disp_gpll0_div_clk_src = { variable
2348 .name = "gcc_disp_gpll0_div_clk_src",
3676 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
H A Dgcc-sm6125.c2549 static struct clk_branch gcc_disp_gpll0_div_clk_src = { variable
2555 .name = "gcc_disp_gpll0_div_clk_src",
3966 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
/linux/arch/arm64/boot/dts/qcom/
H A Dsm6375-sony-xperia-murray-pdx225.dts45 <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>;
H A Dsm6125.dtsi1422 <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>;
1430 "gcc_disp_gpll0_div_clk_src";
H A Dsdm670.dtsi1649 <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
1658 "gcc_disp_gpll0_div_clk_src",
H A Dqcm2290.dtsi1787 <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
1793 "gcc_disp_gpll0_div_clk_src",

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