Searched full:dynamiq (Results 1 – 5 of 5) sorted by relevance
8 title: ARM DynamIQ Shared Unit (DSU) Performance Monitor Unit (PMU)15 ARM DynamIQ Shared Unit (DSU) integrates one or more CPU cores with a shared
2 ARM DynamIQ Shared Unit (DSU) PMU5 ARM DynamIQ Shared Unit integrates one or more cores with an L3 memory system,
157 tristate "ARM DynamIQ Shared Unit (DSU) PMU"160 Provides support for performance monitor unit in ARM DynamIQ Shared
3 * ARM DynamIQ Shared Unit (DSU) PMU Low level register access routines.
343 * The L3 cache belongs to the DynamIQ Shared Unit (DSU),