Home
last modified time | relevance | path

Searched full:dra7x (Results 1 – 17 of 17) sorted by relevance

/linux/Documentation/devicetree/bindings/phy/
H A Dti,omap-usb2.yaml18 - ti,dra7x-usb2
19 - ti,dra7x-usb2-phy2
H A Dti-phy.txt14 e.g. PCIE PHY in DRA7x
/linux/arch/arm/boot/dts/ti/omap/
H A Ddra7-dspeve-thermal.dtsi3 * Device Tree Source for DRA7x SoC DSPEVE thermal
H A Ddra7-iva-thermal.dtsi3 * Device Tree Source for DRA7x SoC IVA thermal
H A Ddra7-l4.dtsi264 compatible = "ti,dra7x-usb2", "ti,omap-usb2";
275 compatible = "ti,dra7x-usb2-phy2",
/linux/Documentation/devicetree/bindings/arm/omap/
H A Ddmm.txt11 Should contain "ti,omap5-dmm" for OMAP5 and DRA7x family
/linux/Documentation/devicetree/bindings/dma/
H A Ddma-router.yaml17 lines from devices to the DMA controller. Some SoCs (like TI DRA7x)
/linux/Documentation/devicetree/bindings/media/
H A Dti,vpe.yaml7 title: Texas Instruments DRA7x Video Processing Engine (VPE)
/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,dra7-dss.txt1 Texas Instruments DRA7x Display Subsystem
/linux/Documentation/devicetree/bindings/clock/ti/
H A Dti,mux-clock.yaml82 access requires this. As an example, dra7x DPLL_GMAC H14 muxing
/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dvideo-pll.c45 * DRA7x PLL CTRL's PLL_PWR_STATUS seems to always return 0, in dss_dpll_power_enable()
/linux/drivers/gpu/drm/omapdrm/dss/
H A Dvideo-pll.c43 * DRA7x PLL CTRL's PLL_PWR_STATUS seems to always return 0, in dss_dpll_power_enable()
/linux/sound/soc/ti/
H A DKconfig39 - DRA7x devices
/linux/Documentation/devicetree/bindings/net/
H A Dcpsw.txt9 "ti,dra7-cpsw" for DRA7x controllers
/linux/drivers/cpufreq/
H A DKconfig.arm264 DRA7x, and AM57x platforms.
/linux/arch/arm/mach-omap2/
H A Domap_hwmod.h443 * DCAN on DRA7x SoC needs this to workaround errata i893.
/linux/drivers/tty/serial/8250/
H A D8250_omap.c41 * The same errata is applicable to AM335x and DRA7x processors too.