Searched full:ddr4 (Results 1 – 17 of 17) sorted by relevance
/freebsd/share/man/man4/ |
H A D | jedec_dimm.4 | 32 .Nd report asset information and temperatures for JEDEC DDR3 / DDR4 DIMMs 58 (SPD) data on JEDEC DDR3 and DDR4 DIMMs. 90 the DIMM type (DDR3 or DDR4) 129 Consider two DDR4 DIMMs with the following hints: 143 dev.jedec_dimm.0.%desc: DDR4 DIMM w/ Atmel TSOD (A1) 155 dev.jedec_dimm.0.type: DDR4 157 dev.jedec_dimm.6.%desc: DDR4 DIMM w/ TSE2004av compliant TSOD 168 dev.jedec_dimm.6.type: DDR4
|
/freebsd/sys/dev/jedec_dimm/ |
H A D | jedec_dimm.h | 36 * bytes (DDR4) of "Serial Presence Detect" (SPD) information. The SPD contains 41 * JEDEC Standard 21-C, Annex L (DDR4) 50 * JEDEC Standard 21-C, TSE2004av (DDR4) 79 * and Annex L (DDR4). Conveniently, the DRAM type is at the same offset for 112 * to the latest SPD specification. In this case, Annex L for DDR4. 135 * between TSE2002av (DDR3) and TSE2004av (DDR4).
|
H A D | jedec_dimm.c | 61 char part_str[21]; /* 18 (DDR3) or 20 (DDR4) chars, plus terminator */ 176 * The DDR4 SPD information is spread across two 256-byte pages, but the 308 (void) snprintf(sc->type_str, sizeof(sc->type_str), "DDR4"); in jedec_dimm_attach() 352 * is in fact present. (While DDR3 and DDR4 don't explicitly require a in jedec_dimm_attach() 353 * TSOD, essentially all DDR3 and DDR4 DIMMs include one.) But, as in jedec_dimm_attach() 462 * Calculate the capacity of a DIMM. Both DDR3 and DDR4 encode "geometry" 466 * and DDR4. The SPD offsets of where the data comes from are different between 549 /* The "SDRAM Package Type" is only needed for DDR4 DIMMs. */ in jedec_dimm_capacity() 572 * valid for DDR4. in jedec_dimm_capacity() 591 * 7-9 are only valid for DDR4. in jedec_dimm_capacity() [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8mm-ddr4-evk.dts | 11 model = "FSL i.MX8MM DDR4 EVK with CYW43455 WIFI/BT board"; 12 compatible = "fsl,imx8mm-ddr4-evk", "fsl,imx8mm";
|
H A D | imx8mn-ddr4-evk.dts | 12 model = "NXP i.MX8MNano DDR4 EVK board"; 13 compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
|
/freebsd/sys/contrib/device-tree/Bindings/edac/ |
H A D | aspeed-sdram-edac.txt | 3 The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error
|
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | nuvoton,npcm-memory-controller.yaml | 14 The Nuvoton BMC SoC supports DDR4 memory with or without ECC (error correction
|
H A D | snps,dw-umctl2-ddrc.yaml | 15 working with the memory devices supporting up to (LP)DDR4 protocol. It can
|
/freebsd/sys/contrib/device-tree/Bindings/regulator/ |
H A D | renesas,raa215300.yaml | 14 32-bit and 64-bit MCU and MPU applications. It supports DDR3, DDR3L, DDR4,
|
/freebsd/sys/contrib/device-tree/Bindings/arm/ |
H A D | fsl.yaml | 917 - fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board 1020 - fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board
|
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
H A D | rk3568-evb1-v10.dts | 15 model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
|
H A D | rk3568-bpi-r2-pro.dts | 15 model = "Bananapi-R2 Pro (RK3568) DDR4 Board";
|
/freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
H A D | zynqmp-zcu111-revA.dts | 547 /* DDR4 SODIMM */
|
H A D | zynqmp-zcu102-revA.dts | 647 /* DDR4 SODIMM */
|
H A D | zynqmp-zcu106-revA.dts | 658 /* DDR4 SODIMM */
|
/freebsd/sys/contrib/alpine-hal/ |
H A D | al_hal_nb_regs.h | 1774 /* DDR4 Mode Register Read Data Valid */
|
/freebsd/sys/conf/ |
H A D | NOTES | 2250 # jedec_dimm Asset and temperature reporting for DDR3 and DDR4 DIMMs
|