| /linux/drivers/gpu/drm/mediatek/ |
| H A D | mtk_hdmi_ddc.c | 64 static inline void sif_set_bit(struct mtk_hdmi_ddc *ddc, unsigned int offset, in sif_set_bit() argument
67 writel(readl(ddc->regs + offset) | val, ddc->regs + offset); in sif_set_bit()
70 static inline void sif_clr_bit(struct mtk_hdmi_ddc *ddc, unsigned int offset, in sif_clr_bit() argument
73 writel(readl(ddc->regs + offset) & ~val, ddc->regs + offset); in sif_clr_bit()
76 static inline bool sif_bit_is_set(struct mtk_hdmi_ddc *ddc, unsigned int offset, in sif_bit_is_set() argument
79 return (readl(ddc->regs + offset) & val) == val; in sif_bit_is_set()
82 static inline void sif_write_mask(struct mtk_hdmi_ddc *ddc, unsigned int offset, in sif_write_mask() argument
88 tmp = readl(ddc->regs + offset); in sif_write_mask()
91 writel(tmp, ddc->regs + offset); in sif_write_mask()
94 static inline unsigned int sif_read_mask(struct mtk_hdmi_ddc *ddc, in sif_read_mask() argument
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| H A D | mtk_hdmi_ddc_v2.c | 44 static int mtk_ddc_check_and_rise_low_bus(struct mtk_hdmi_ddc *ddc) in mtk_ddc_check_and_rise_low_bus() argument
48 regmap_read(ddc->regs, HDCP2X_DDCM_STATUS, &val); in mtk_ddc_check_and_rise_low_bus()
50 regmap_update_bits(ddc->regs, DDC_CTRL, DDC_CTRL_CMD, in mtk_ddc_check_and_rise_low_bus()
58 regmap_read(ddc->regs, DDC_CTRL, &ddc_ctrl); in mtk_ddc_check_and_rise_low_bus()
59 regmap_read(ddc->regs, HPD_DDC_CTRL, &hpd_ddc_ctrl); in mtk_ddc_check_and_rise_low_bus()
60 regmap_read(ddc->regs, HPD_DDC_STATUS, &hpd_ddc_status); in mtk_ddc_check_and_rise_low_bus()
69 static int mtk_ddcm_write_hdmi(struct mtk_hdmi_ddc *ddc, u16 addr_id, in mtk_ddcm_write_hdmi() argument
79 dev_err(ddc->dev, "Invalid DDCM write request\n"); in mtk_ddcm_write_hdmi()
84 mtk_ddc_check_and_rise_low_bus(ddc); in mtk_ddcm_write_hdmi()
86 regmap_update_bits(ddc->regs, HPD_DDC_CTRL, HPD_DDC_DELAY_CNT, in mtk_ddcm_write_hdmi()
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| /linux/drivers/gpu/drm/mgag200/ |
| H A D | mgag200_ddc.c | 75 struct mgag200_ddc *ddc = data; in mgag200_ddc_algo_bit_data_setsda() local
77 mga_i2c_set(ddc->mdev, ddc->data, state); in mgag200_ddc_algo_bit_data_setsda()
82 struct mgag200_ddc *ddc = data; in mgag200_ddc_algo_bit_data_setscl() local
84 mga_i2c_set(ddc->mdev, ddc->clock, state); in mgag200_ddc_algo_bit_data_setscl()
89 struct mgag200_ddc *ddc = data; in mgag200_ddc_algo_bit_data_getsda() local
91 return (mga_i2c_read_gpio(ddc->mdev) & ddc->data) ? 1 : 0; in mgag200_ddc_algo_bit_data_getsda()
96 struct mgag200_ddc *ddc = data; in mgag200_ddc_algo_bit_data_getscl() local
98 return (mga_i2c_read_gpio(ddc->mdev) & ddc->clock) ? 1 : 0; in mgag200_ddc_algo_bit_data_getscl()
103 struct mgag200_ddc *ddc = i2c_get_adapdata(adapter); in mgag200_ddc_algo_bit_data_pre_xfer() local
104 struct mga_device *mdev = ddc->mdev; in mgag200_ddc_algo_bit_data_pre_xfer()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/ |
| H A D | gpio_service.c | 488 struct ddc *dal_gpio_create_ddc( in dal_gpio_create_ddc()
496 struct ddc *ddc; in dal_gpio_create_ddc() local
501 ddc = kzalloc_obj(struct ddc); in dal_gpio_create_ddc()
503 if (!ddc) { in dal_gpio_create_ddc()
508 ddc->pin_data = dal_gpio_create( in dal_gpio_create_ddc()
511 if (!ddc->pin_data) { in dal_gpio_create_ddc()
516 ddc->pin_clock = dal_gpio_create( in dal_gpio_create_ddc()
519 if (!ddc->pin_clock) { in dal_gpio_create_ddc()
524 ddc->hw_info = *info; in dal_gpio_create_ddc()
526 ddc->ctx = service->ctx; in dal_gpio_create_ddc()
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| H A D | gpio_base.c | 69 if (!gpio->hw_container.ddc) { in dal_gpio_open_ex()
238 return gpio->hw_container.ddc; in dal_gpio_get_ddc()
290 gpio->service->factory.funcs->init_ddc_data(&gpio->hw_container.ddc, service->ctx, id, en); in dal_gpio_create()
293 gpio->service->factory.funcs->init_ddc_data(&gpio->hw_container.ddc, service->ctx, id, en); in dal_gpio_create()
324 kfree((*gpio)->hw_container.ddc); in dal_gpio_destroy()
325 (*gpio)->hw_container.ddc = NULL; in dal_gpio_destroy()
329 kfree((*gpio)->hw_container.ddc); in dal_gpio_destroy()
330 (*gpio)->hw_container.ddc = NULL; in dal_gpio_destroy()
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| /linux/drivers/gpu/drm/ast/ |
| H A D | ast_ddc.c | 42 struct ast_ddc *ddc = data; in ast_ddc_algo_bit_data_setsda() local
43 struct ast_device *ast = ddc->ast; in ast_ddc_algo_bit_data_setsda()
58 struct ast_ddc *ddc = data; in ast_ddc_algo_bit_data_setscl() local
59 struct ast_device *ast = ddc->ast; in ast_ddc_algo_bit_data_setscl()
74 struct ast_ddc *ddc = i2c_get_adapdata(adapter); in ast_ddc_algo_bit_data_pre_xfer() local
75 struct ast_device *ast = ddc->ast; in ast_ddc_algo_bit_data_pre_xfer()
88 struct ast_ddc *ddc = i2c_get_adapdata(adapter); in ast_ddc_algo_bit_data_post_xfer() local
89 struct ast_device *ast = ddc->ast; in ast_ddc_algo_bit_data_post_xfer()
96 struct ast_ddc *ddc = data; in ast_ddc_algo_bit_data_getsda() local
97 struct ast_device *ast = ddc->ast; in ast_ddc_algo_bit_data_getsda()
[all …]
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| H A D | ast_sil164.c | 84 struct i2c_adapter *ddc; in ast_sil164_output_init() local
90 /* DDC */ in ast_sil164_output_init()
92 ddc = ast_ddc_create(ast); in ast_sil164_output_init()
93 if (IS_ERR(ddc)) in ast_sil164_output_init()
94 return PTR_ERR(ddc); in ast_sil164_output_init()
110 DRM_MODE_CONNECTOR_DVII, ddc); in ast_sil164_output_init()
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| H A D | ast_vga.c | 84 struct i2c_adapter *ddc; in ast_vga_output_init() local
90 /* DDC */ in ast_vga_output_init()
92 ddc = ast_ddc_create(ast); in ast_vga_output_init()
93 if (IS_ERR(ddc)) in ast_vga_output_init()
94 return PTR_ERR(ddc); in ast_vga_output_init()
110 DRM_MODE_CONNECTOR_VGA, ddc); in ast_vga_output_init()
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| /linux/Documentation/devicetree/bindings/display/mediatek/ |
| H A D | mediatek,hdmi-ddc.yaml | 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi-ddc.yaml#
7 title: Mediatek HDMI DDC
14 The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.
19 - mediatek,mt7623-hdmi-ddc
20 - mediatek,mt8167-hdmi-ddc
21 - mediatek,mt8173-hdmi-ddc
34 - const: ddc-i2c
51 compatible = "mediatek,mt8173-hdmi-ddc";
55 clock-names = "ddc-i2c";
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| /linux/drivers/gpu/drm/tegra/ |
| H A D | output.c | 39 else if (output->ddc) in tegra_output_connector_get_modes()
40 drm_edid = drm_edid_read_ddc(connector, output->ddc); in tegra_output_connector_get_modes()
99 struct device_node *ddc, *panel; in tegra_output_probe() local
127 ddc = of_parse_phandle(output->of_node, "nvidia,ddc-i2c-bus", 0); in tegra_output_probe()
128 if (ddc) { in tegra_output_probe()
129 output->ddc = of_get_i2c_adapter_by_node(ddc); in tegra_output_probe()
130 of_node_put(ddc); in tegra_output_probe()
132 if (!output->ddc) { in tegra_output_probe()
188 if (output->ddc) in tegra_output_probe()
189 i2c_put_adapter(output->ddc); in tegra_output_probe()
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| /linux/Documentation/devicetree/bindings/display/ |
| H A D | allwinner,sun4i-a10-hdmi.yaml | 44 - description: The HDMI DDC clock
59 - const: ddc
68 - description: DDC Transmission DMA Channel
69 - description: DDC Reception DMA Channel
74 - const: ddc-tx
75 - const: ddc-rx
142 dma-names = "ddc-tx", "ddc-rx", "audio-tx";
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| H A D | brcm,bcm2835-hdmi.yaml | 34 ddc:
37 Phandle of the I2C controller used for DDC EDID probing
62 - ddc
76 ddc = <&i2c2>;
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| /linux/drivers/gpu/drm/bridge/ |
| H A D | display-connector.c | 54 if (conn->bridge.ddc && drm_probe_ddc(conn->bridge.ddc)) in display_connector_detect()
64 * For DVI and HDMI connectors a DDC probe failure indicates in display_connector_detect()
77 * if drm_probe_ddc fails, as some cables don't wire the DDC in display_connector_detect()
95 return drm_edid_read_ddc(connector, conn->bridge.ddc); in display_connector_edid_read()
319 /* Retrieve the DDC I2C adapter for DVI, HDMI and VGA connectors. */ in display_connector_probe()
325 phandle = of_parse_phandle(pdev->dev.of_node, "ddc-i2c-bus", 0); in display_connector_probe()
327 conn->bridge.ddc = of_get_i2c_adapter_by_node(phandle); in display_connector_probe()
329 if (!conn->bridge.ddc) in display_connector_probe()
346 /* enable DDC */ in display_connector_probe()
350 conn->ddc_en = devm_gpiod_get_optional(&pdev->dev, "ddc-en", in display_connector_probe()
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_i2c_sw.h | 36 struct ddc *ddc; member
48 struct ddc *ddc,
54 struct ddc *ddc_handle);
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce80/ |
| H A D | hw_factory_dce80.c | 120 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local
124 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers()
125 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers()
128 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers()
129 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
136 ddc->shifts = &ddc_shift; in define_ddc_registers()
137 ddc->masks = &ddc_mask; in define_ddc_registers()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce60/ |
| H A D | hw_factory_dce60.c | 120 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local
124 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers()
125 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers()
128 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers()
129 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
136 ddc->shifts = &ddc_shift; in define_ddc_registers()
137 ddc->masks = &ddc_mask; in define_ddc_registers()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce110/ |
| H A D | hw_factory_dce110.c | 116 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local
120 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers()
121 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers()
124 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers()
125 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
132 ddc->shifts = &ddc_shift; in define_ddc_registers()
133 ddc->masks = &ddc_mask; in define_ddc_registers()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_connectors.c | 272 &amdgpu_connector->ddc_bus->aux.ddc); in amdgpu_connector_get_edid()
281 &amdgpu_connector->ddc_bus->aux.ddc); in amdgpu_connector_get_edid()
882 * with a shared ddc line (often vga + hdmi) in amdgpu_connector_vga_detect()
994 * Do a DDC probe, if DDC probe passes, get the full EDID so
996 * If the monitor is an analog monitor or we got no DDC,
998 * If we got no DDC, we do load detection on the DAC encoder object.
999 * If we got analog DDC or load detection passes on the DAC encoder
1035 /* Sometimes the pins required for the DDC probe on DVI in amdgpu_connector_dvi_detect()
1037 * for HPD do. If the DDC probe fails even though we had an HPD in amdgpu_connector_dvi_detect()
1042 DRM_DEBUG_KMS("hpd detected without ddc, retrying in 1 second\n"); in amdgpu_connector_dvi_detect()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
| H A D | hw_factory_dce120.c | 133 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local
137 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers()
138 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers()
141 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers()
142 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
149 ddc->shifts = &ddc_shift; in define_ddc_registers()
150 ddc->masks = &ddc_mask; in define_ddc_registers()
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| /linux/Documentation/devicetree/bindings/display/connector/ |
| H A D | hdmi-connector.yaml | 31 ddc-i2c-bus:
32 description: phandle link to the I2C controller used for DDC EDID probing
35 ddc-en-gpios:
36 description: GPIO signal to enable DDC bus
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| /linux/drivers/video/fbdev/matrox/ |
| H A D | i2c-matroxfb.c | 23 /* primary head DDC for Mystique(?), G100, G200, G400 */
26 /* primary head DDC for Millennium, Millennium II */
29 /* secondary head DDC for G400 */
161 "DDC:fb%u #0"); in i2c_matroxfb_probe()
166 "DDC:fb%u #0"); in i2c_matroxfb_probe()
172 err = i2c_bus_reg(&m2info->ddc2, minfo, DDC2_DATA, DDC2_CLK, "DDC:fb%u #1"); in i2c_matroxfb_probe()
174 printk(KERN_INFO "i2c-matroxfb: VGA->TV plug detected, DDC unavailable.\n"); in i2c_matroxfb_probe()
196 printk(KERN_ERR "i2c-matroxfb: Could not register primary adapter DDC bus.\n"); in i2c_matroxfb_probe()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
| H A D | hw_factory_dcn10.c | 165 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local
169 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers()
170 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers()
173 ddc->regs = &ddc_clk_regs[en]; in define_ddc_registers()
174 ddc->base.regs = &ddc_clk_regs[en].gpio; in define_ddc_registers()
181 ddc->shifts = &ddc_shift; in define_ddc_registers()
182 ddc->masks = &ddc_mask; in define_ddc_registers()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
| H A D | hw_factory_dcn21.c | 173 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local
177 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
178 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers()
181 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
182 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio; in define_ddc_registers()
189 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
190 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | aux_engine.h | 92 struct ddc *ddc; member
150 struct ddc_service *ddc,
177 struct ddc *ddc);
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
| H A D | hw_factory_dcn30.c | 202 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); in define_ddc_registers() local
206 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
207 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers()
210 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
211 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio; in define_ddc_registers()
218 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
219 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
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